ASIC Design Engineer

Celero Communications; Ottawa; On-site; CAD 85,000 - 130,000; Full time

Job summary

Celero Communications in Ottawa, Ontario, is seeking skilled ASIC Design Engineers to contribute to optical transceiver development. You will design and implement digital ASICs, using HDL Verilog/SystemVerilog, and perform synthesis, timing, and verification to ensure correct functionality.

Join a collaborative team responsible for optimizing performance, power, and area, and participating in design reviews. A Bachelor's degree in EE/CE and 3+ years of experience are required.

Qualifications

• HDL: Verilog/SystemVerilog experience.
• Digital design and verification.
• Proficiency with ASIC design flow and tools.
• Low-power design techniques.
• Verification methodologies (UVM, formal).
• Strong problem-solving and teamwork.

Responsibilities

• Design and implement digital circuits using HDL (Verilog/SystemVerilog).
• Perform synthesis, timing analysis, Lint, formal equivalence, CDC analysis.
• Optimize designs for performance, power, and area (PPA).
• Perform RTL simulation and verification to ensure design functionality.
• Participate in design reviews and provide technical guidance to team members.
• Collaborate with cross-functional teams on system integration and validation.

Job description

Celero is seeking skilled and motivated ASIC Design Engineers to join our team and contribute to the development of optical transceivers for next-generation optical modems. The ideal candidate will play a crucial role in designing and developing ASICs for cutting-edge technologies.

Location

Ottawa, Ontario, Canada

What You Will Do

• Design and implement digital circuits using HDL (Verilog/ System Verilog).
• Perform synthesis, timing analysis, Lint, formal equivalence, Clock Domain Crossing (CDC) analysis
• Optimize designs for performance, power, and area (PPA) requirements.
• Perform RTL simulation and verification to ensure design functionality.
• Participate in design reviews and provide technical guidance to team members.
• Collaborate with cross-functional teams on system integration and validation.

What You Will Bring

• Bachelor’s or higher degree in Electrical Engineering, Computer Engineering, or a related field.
• 3+ years of experience in digital design and verification.
• Proficiency in HDLs such as Verilog, or System Verilog.
• Strong understanding of digital design principles and methodologies.
• Familiarity with ASIC design flow, and experience with ASIC design tools.
• Knowledge of low-power design techniques.
• Familiarity with verification methodologies (e.g., UVM, formal verification).
• Excellent problem-solving, strong communication and teamwork skills.

Preferred Skills

• Strong knowledge of Digital Signal Processing (DSP), Digital Communication, and Forward Error Correction (FEC) techniques.
• Experience with scripting languages (e.g., Python, Tcl).
• Understanding of Optical Communication Standards is a plus.
• Ability to multitask and adapt to a fast-paced, dynamic environment.