SystemC/TLM-2.0 CPU Subsystem Modeling Engineer - 2Y

Karlstad University; Heverlee; Sur place; EUR 60 000 - 80 000; Plein temps

Résumé du poste

Karlstad University is seeking a SystemC/TLM-2.0 Modeling Engineer for a temporary assignment focusing on the CPU subsystem of RISC-V-based compute platforms. You will develop models for cores, caches, and interconnects to enable architectural exploration and software enablement.

The ideal candidate has over 5 years of experience with SystemC and modern C++, a solid understanding of CPU architecture, and excellent communication skills. This role is based in Heverlee, Belgium.

Qualifications

• At least 5 years of hands-on experience developing SystemC models.
• Strong discipline in writing fast, maintainable C++ code.
• Solid understanding of CPU and SoC architecture.
• Experience with LT and AT modeling styles.
• Excellent written and spoken English required.

Responsabilités

• Develop SystemC TLM-2.0 models of the CPU subsystem.
• Assemble and maintain virtual platforms for full-system simulation.
• Drive architectural exploration studies with SoC architects.
• Define and run pre-silicon performance analysis flows.
• Collaborate with RTL design and verification teams.

Connaissances

SystemC modeling

TLM-2.0 experience

Modern C++ (C++11+)

Scripting (Python, Tcl)

Collaboration

Outils

Synopsys Virtualizer

Arm Fast Models

gem5

QEMU

Description du poste

Karlstad University is seeking a SystemC/TLM-2.0 Modeling Engineer for a temporary assignment focusing on the CPU subsystem of RISC-V-based compute platforms. You will develop models for cores, caches, and interconnects to enable architectural exploration and software enablement.

The ideal candidate has over 5 years of experience with SystemC and modern C++, a solid understanding of CPU architecture, and excellent communication skills. This role is based in Heverlee, Belgium.