Virtual Platform Architect for Next-Gen Compute Systems

Karlstad University

Heverlee

Sur place

EUR 75 000 - 110 000

Plein temps

14 jours+

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Avantages offerts par ce poste

Market salary + fringe benefits

Résumé du poste

Imec in Leuven, Belgium, invites applications for a Virtual Platform R&D Engineer to develop, enable, and maintain our baseline platform across functional models, RTL prototyping, and simulation environments.

You will work at the intersection of compute architecture, system software, and modeling, collaborating with a distributed team, mentoring students, and contributing to project definitions while ensuring rigorous validation from ISA to FPGA.

Qualifications

  • Master’s or PhD in Electrical/Electronics/Computer Engineering/Science with hands-on compute architecture systems.
  • Strong knowledge of modern compute and memory systems and SoC components.
  • Experience with embedded systems, toolchains, RTOS, and low-level debugging.
  • Proficiency in C/C++, Bash and Python scripting.
  • Hands-on engineer who can bring systems to life.

Responsabilités

  • Develop and maintain virtual platforms across simulated and hardware prototyping environments.
  • Support workload mapping and enable functional models on QEMU, gem5, RTL, and FPGA.
  • Contribute to performance and functional validation from ISA to FPGA.
  • Build system models representing new compute architectures with balanced accuracy and speed.
  • Evaluate architectural features and translate concepts into executable platforms.
  • Mentor students and collaborate with senior team members.

Connaissances

C/C++ programming
Python scripting
Bash scripting
RTL design understanding
Embedded systems
GCC/LLVM toolchains
RTOS (Zephyr)
RISC-V architecture
Debugging skills
Team collaboration

Formation

Master’s or PhD in Electrical/Electronics/Computer Engineering/Science

Outils

QEMU
gem5
RTL/FPGA tooling
GHDL/Verilator

Description du poste

Imec in Leuven, Belgium, invites applications for a Virtual Platform R&D Engineer to develop, enable, and maintain our baseline platform across functional models, RTL prototyping, and simulation environments.

You will work at the intersection of compute architecture, system software, and modeling, collaborating with a distributed team, mentoring students, and contributing to project definitions while ensuring rigorous validation from ISA to FPGA.

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