Senior Physical Design Engineer - Timing & Tapeout Lead

Infineon; Western Australia; On-site; AUD 180,000 - 240,000; Full time

Job summary

Infineon in Australia is seeking a Digital Design Engineer within our Research & Development team to own physical design implementation for complex digital blocks, including floorplanning, placement, clock tree synthesis, routing and physical optimization. You will drive timing closure and perform physical verification across the backend flow.

You will collaborate with RTL, design verification, DFT, STA, library and package teams to resolve issues, develop constraints and scripts, mentor junior

Qualifications

• Bachelor’s in Electrical Engineering or Computer Engineering.
• 7–10+ years of industry experience as Physical Design Engineer.
• Experience with blocks/top-level physical design.
• Knowledge of timing closure, IR/EM, LVS/DRC.
• Experience with TCL and Python scripting.
• Strong teamwork and multi-team collaboration.
• Ability to thrive in a fast-paced environment.

Responsibilities

• Own physical design implementation for complex digital blocks and subsystems, including floorplanning, placement, clock tree synthesis, routing and physical optimization.
• Drive timing closure, congestion analysis, power optimization and area improvement across the backend flow.
• Perform physical verification (DRC, LVS, ERC) and reliability checks in collaboration with teams.
• Develop and refine physical design constraints, scripts and flow improvements; contribute to methodology improvements.
• Collaborate with RTL, design verification, DFT, STA, library and package teams to resolve design issues and participate in design reviews.
• Author and maintain design implementation documentation and signoff status; mentor junior engineers.
• Support tapeout planning and execution to meet project milestones.

Skills

Physical design collaboration

Scripting (Python/TCL)

Teamwork

Adaptability

Education

Bachelor’s in Electrical Engineering or Computer Engineering

Tools

TCL

Python

Job description

Infineon in Australia is seeking a Digital Design Engineer within our Research & Development team to own physical design implementation for complex digital blocks, including floorplanning, placement, clock tree synthesis, routing and physical optimization. You will drive timing closure and perform physical verification across the backend flow.

You will collaborate with RTL, design verification, DFT, STA, library and package teams to resolve issues, develop constraints and scripts, mentor junior