Senior IC Design Flow Engineer - Automation & EDA

Silicon Austria Labs (SAL); Linz; On-site; EUR 56,000 - 68,000; Full time

Benefits offered by this job

Relocation support

Career development

Family-friendly culture

Meal allowance

Public transport subsidy

Job summary

Silicon Austria Labs (SAL) in Linz, Austria, seeks an experienced IC Design Flow Engineer to build, optimize, and maintain scalable ASIC/SoC flows from architectural validation through sign-off. You will collaborate with internal teams and external partners to ensure a robust, modular tool chain that adapts to different technologies and EDA vendors.

The role requires a Master's in engineering, 3+ years' IC flow experience, strong scripting (Python, Tcl, Bash) and CI/CD familiarity, and excellent

Qualifications

• Master's degree in Electrical or Computer Engineering, Physics, or closely related field.
• Minimum 3 years' industrial experience as IC Design Flow Engineer or similar.
• Strong scripting and automation with Git/Jenkins CI/CD familiarity.

Responsibilities

• Own end-to-end EDA environments setup across multiple PDKs and nodes.
• Improve flow methodologies and ensure reproducibility through version control.
• Define automation scripts and CI/CD pipelines for synthesis, DFT, verification, and physical implementation.
• Provide hands-on guidance and troubleshooting on EDA tool usage.
• Identify bottlenecks and implement scalable solutions to reduce tapeout time.
• Maintain flow configurations and script libraries for rapid onboarding.
• Oversee flow validation across benchmark and production projects.
• Support cross-site and partner/customer engineering teams.

Skills

Automation scripting

Python

Version control

CI/CD

English communication

Education

Master's degree in Electrical Engineering, Computer Engineering, Physics, or related field

Tools

Synopsys

Cadence

Siemens/Mentor

Git

Jenkins

Job description

Silicon Austria Labs (SAL) in Linz, Austria, seeks an experienced IC Design Flow Engineer to build, optimize, and maintain scalable ASIC/SoC flows from architectural validation through sign-off. You will collaborate with internal teams and external partners to ensure a robust, modular tool chain that adapts to different technologies and EDA vendors.

The role requires a Master's in engineering, 3+ years' IC flow experience, strong scripting (Python, Tcl, Bash) and CI/CD familiarity, and excellent