Yield & Defect Metrology Engineer — Hybrid Role

Intel Corporation

Phoenix, Northern (AZ, KY)

Hybrid

USD 115,000 - 220,000

Full time

3 days ago
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Benefits offered by this job

Stock bonuses
Health insurance
Hybrid work model
Retirement plan

Job summary

Intel Corporation in Phoenix, Arizona, is seeking a Yield Development Engineer to advance semiconductor process technology. You will identify root causes of yield limiters, perform statistical analysis, and develop data-driven roadmaps to improve yield across technology nodes.

You will collaborate with cross-functional teams, design measurement recipes, and optimize equipment and methodologies to meet the needs of advanced logic nodes.

Qualifications

  • Bachelor's degree in Electrical Engineering or closely related field.
  • 4+ years of experience in yield development or process technology.
  • Strong statistics, data analysis and visualization skills.
  • Experience with cross-functional teams and problem solving.

Responsibilities

  • Identify root cause yield limiters across technology nodes and develop solutions.
  • Perform statistical analysis and create visualizations to drive roadmaps.
  • Develop data consolidation methods for defect mode understanding and yield modeling.
  • Design measurement recipes and collaborate with teams to fix yield issues.
  • Support design-technology co-optimization and factory task forces.

Skills

Yield development
Statistical analysis
Data visualization
Cross-functional collaboration
Machine learning basics

Education

Bachelor's degree in Electrical Engineering

Tools

Statistical software

Job description

Intel Corporation in Phoenix, Arizona, is seeking a Yield Development Engineer to advance semiconductor process technology. You will identify root causes of yield limiters, perform statistical analysis, and develop data-driven roadmaps to improve yield across technology nodes.

You will collaborate with cross-functional teams, design measurement recipes, and optimize equipment and methodologies to meet the needs of advanced logic nodes.

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