Yield AI Engineer: Data-Driven Semiconductors

Intel Corporation; Hillsboro (OR); On-site; USD 142,000 - 269,000; Full time

Benefits offered by this job

Competitive pay

Stock bonuses

Health & retirement benefits

Vacation plan

Job summary

Intel Corporation in Hillsboro, Oregon seeks a Yield Development Engineer to advance AMD/Intel LTD process technologies, improve manufacturability, and drive yield milestones through data‑driven analysis and ML techniques.

The role emphasizes collaboration across design teams, development of measurement recipes, and rapid feedback loops to ensure robust manufacturing and product quality for next‑generation logic nodes.

Qualifications

• PhD in a semiconductor science-related STEM field.
• Experience with data analysis systems and software tools.
• Proven program or project management experience across matrix organizations.

Responsibilities

• Develop methods to consolidate and analyze diverse data sources for defect understanding and yield modeling.
• Perform statistical analysis, create visualizations, and map process development roadmaps.
• Extract insights from structured and unstructured data using statistics, ML, and coding.
• Organize and interpret factory data to drive process changes for yield improvements.
• Develop multivariate algorithms to identify yield limiters and recommend changes.
• Collaborate with design teams to resolve yield issues before ramp.
• Execute new product introductions and enable design-technology co-optimization.
• Develop measurement recipes for rapid feedback on product integrity.
• Create systems to meet operational needs for advanced logic nodes.

Skills

Data analysis

Project management

Cross-functional collaboration

Education

PhD in semiconductor science

Tools

Statistical software

Job description

Intel Corporation in Hillsboro, Oregon seeks a Yield Development Engineer to advance AMD/Intel LTD process technologies, improve manufacturability, and drive yield milestones through data‑driven analysis and ML techniques.

The role emphasizes collaboration across design teams, development of measurement recipes, and rapid feedback loops to ensure robust manufacturing and product quality for next‑generation logic nodes.