Wireless RTL Design Engineer - Verilog/VHDL, 802.11

Redolent Infotech Pvt. Ltd.; Santa Clara (CA); On-site; USD 90,000 - 150,000; Full time

Job summary

Redolent Infotech Pvt. Ltd. is seeking an RTL Design Engineer for an urgent contract role in Santa Clara, CA and Hudson, MA. The incumbent will work on communication techniques (PHY, FFT, filters, modulations, coding, acquisition) and DSP-based wireless or wireline modem systems.

Candidates should have familiarity with Verilog/SV or VHDL and scripting skills (Unix/Linux shell, Perl, Java, Makefile, XML). This is a 6+ month assignment with direct client, evaluated for immediate start.

Qualifications

• Experience in RTL design and verification for wireless/DSP systems.
• Familiarity with 802.11 protocol is preferred.
• Proficiency in Verilog/SV or VHDL and scripting for automation.

Responsibilities

• Work on communication techniques (PHY, FFT, filters, modulations, coding, acquisition).
• Engage in wireless or wireline modem communications or DSP projects.
• Apply scripting and automation to design and verification tasks.

Skills

Wireless communication

DSP background

802.11 familiarity

Verilog/SV or VHDL

Scripting (Unix/Linux)

Perl

Java

Makefile

XML

Tools

Verilog/VHDL tools

Unix/Linux shell

Makefile tooling

XML tooling

Job description

Redolent Infotech Pvt. Ltd. is seeking an RTL Design Engineer for an urgent contract role in Santa Clara, CA and Hudson, MA. The incumbent will work on communication techniques (PHY, FFT, filters, modulations, coding, acquisition) and DSP-based wireless or wireline modem systems.

Candidates should have familiarity with Verilog/SV or VHDL and scripting skills (Unix/Linux shell, Perl, Java, Makefile, XML). This is a 6+ month assignment with direct client, evaluated for immediate start.