Verification Team Lead: RTL, UVM, SystemVerilog

Retym Israel Ltd; Austin (TX); On-site; USD 130,000 - 160,000; Full time

Job summary

A well-funded start-up in Austin, Texas seeks a Verification Team-Leader to drive RTL design verification activities. The ideal candidate will have over 10 years in digital design verification, including 3 years in leadership roles. Responsibilities include managing verification engineers, defining strategies for complex systems, and ensuring technical excellence. Key qualifications include expertise in SystemVerilog and UVM, along with strong communication and organizational skills. Join a team committed to innovation and success.

Qualifications

• 10+ years of experience in digital design verification.
• 3+ years of leading or managing verification teams.
• Proven completion of two or more full verification cycles.

Responsibilities

• Lead and manage a team of verification engineers.
• Define and execute verification strategies and plans.
• Collaborate with design engineers on functionality issues.

Skills

Digital design verification

Team leadership

VLSI verification flows

SystemVerilog

UVM

Problem-solving

Communication

Tools

Python

Perl

Job description

A well-funded start-up in Austin, Texas seeks a Verification Team-Leader to drive RTL design verification activities. The ideal candidate will have over 10 years in digital design verification, including 3 years in leadership roles. Responsibilities include managing verification engineers, defining strategies for complex systems, and ensuring technical excellence. Key qualifications include expertise in SystemVerilog and UVM, along with strong communication and organizational skills. Join a team committed to innovation and success.