Verification Engineer II

NXP Semiconductors; Austin (TX); Hybrid; USD 95,000 - 135,000; Full time

Job summary

NXP Semiconductors in Austin seeks a Verification Engineer II to lead verification efforts for automotive MCU/MPU digital IP. You will define verification plans, build testbenches, develop drivers, monitors, and scoreboards, and apply advanced techniques including UVM, formal methods, and AI/LLM-assisted optimization.

The role requires strong debugging, RTL analysis, and coverage guidance, with ownership of functional coverage and SVA development in a collaborative team environment.

Qualifications

• BSEE or MSEE with appropriate semiconductor experience.
• PhD with foundational industry exposure is acceptable.
• Experience with digital verification methodologies and testbenches preferred.

Responsibilities

• Define and execute verification plans.
• Develop and implement verification testbenches.
• Create drivers, monitors, scoreboards, and reusable components.
• Develop constrained-random stimuli and directed tests.
• Analyze RTL, coverage, and assertions; improve models.
• Develop and maintain SystemVerilog assertions (SVA).
• Apply formal verification methods and debugging skills.

Skills

DDR/PCIe/AMBA

Verilog/SystemVerilog

UVM/OVM

Formal verification

AI/LLM approaches

Python/Perl/UNIX

Debugging & coverage

Education

BSEE with 2-5 years

MSEE with 3+ years

PhD with 1+ years

Tools

Python

Perl

UNIX/Linux

Job description

**Job Title: Verification Engineer II** Location: Austin Role Summary:This position is within the MME MCU/MPU Digital IP team.We develop best-in-class digital IPs for NXP’s automotive and advanced microcontroller businesses, delivering sensor and processing technologies that enable secure, connected vehicles today and autonomous vehicles of the future.· Drive a “zero-defect” mindset across the verification team· Provide technical leadership and guidance on complex verification challenges· Mentor and grow a small team of engineers **Job Responsibility:**· Define and execute verification plans· Develop and implement verification testbenches· Develop testbench components such as drivers, monitors, and scoreboards, and leverage advanced UVM VIPs· Develop directed and constrained-random stimulus· Analyze RTL, functional coverage, and assertion coverage results· Define and develop functional coverage models· Develop and maintain SystemVerilog assertions (SVA)· Apply formal verification methodologies· Demonstrate strong debugging skills, including failure reproduction and root-cause analysis· Exhibit strong analytical and problem-solving skills; familiarity with major simulation and debug tools is a plus **Job Qualification:**· BSEE with 2-5 years of semiconductor industry experience, or· MSEE with 3+ years of experience, or· PhD with 1+ years of experienceTechnical Skills· Knowledge of protocols such as DDR, PCIe, AMBA (CHI, ACE, AXI)· Strong expertise in Verilog, SystemVerilog (VHDL is a plus)· Experience with OVM/UVM and class-based verification methodologies· Experience with formal verification methodologies· Experience leveraging AI/LLM-based approaches to improve engineering efficiency· Test pattern debugging and validation on simulation and automated test environments· Scripting in Python, Perl, and UNIX/Linux· Familiarity with functional and code coverage methodologiesMore information about NXP in the United States...NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.#LI-6692