Verification Engineer

Broadcom; Fort Collins (CO); On-site; USD 122,000 - 195,000; Full time

Job summary

Broadcom’s ASIC Product Division (APD) is seeking an experienced RTL verification engineer to drive block- and system-level verification. You will build SystemVerilog/UVM environments, develop Python models, and collaborate across design, architecture and verification teams to improve quality and productivity.

The role requires a Bachelor’s degree and 8+ years of experience, with proficiency in UVM/OVM, SystemVerilog, Python, and scripting.

Qualifications

• Bachelor’s degree in Electrical/Electronic Engineering, Computer Science
• 8+ years of relevant industry experience
• Strong expertise in RTL verification methodologies, including System Verilog
• Experience with ASIC verification flows and design verification methodologies
• Proficiency in UVM/OVM, Python, C/C++, and scripting
• Experience with block-level and system-level verification
• Strong debugging and problem-solving skills
• Ability to analyze and resolve complex verification trade-offs
• Excellent communication and teamwork skills

Responsibilities

• Develop and execute verification plans for IP blocks at both block and system levels
• Build and maintain System Verilog/UVM-based verification environments and testbenches
• Develop Python-based behavioral models and validate designs by comparing them against RTL implementations
• Analyze simulation results, debug failures, and drive root-cause resolution
• Collaborate with design, architecture, and verification teams to ensure design quality
• Develop and maintain automation scripts and regression frameworks
• Contribute to the improvement of verification methodologies and flows
• Leverage AI-assisted tools (e.g., ChatGPT, Gemini, Cursor) to enhance productivity

Skills

RTL verification

SystemVerilog

UVM/OVM

Python

C/C++

System-level verification

Debugging

Communication

Teamwork

Education

Electrical/Electronic Engineering, Computer Science

Tools

Python scripting

Job description

USA-CA San Jose Innovation Drive

USA-Colorado-Fort Collins-4380 Ziegler Road

Full time

R026363

Broadcom’s ASIC Product Division (APD) is focused on enabling customers to develop products with a sustainable and substantial competitive advantage. APD does this by delivering best in class technology platforms, easy to integrate bleeding edge intellectual property, and by providing world class customer support. APD’s customers span a wide range of industries developing ASICs for largest and most complex cloud computing AI engines, supercomputers, networking, to low power and most advanced wireless solutions as examples.

Responsibilities

• Develop and execute verification plans for IP blocks at both block and system levels
• Build and maintain System Verilog /UVM-based verification environments and testbenches
• Develop Python-based behavioral models and validate designs by comparing them against RTL implementations
• Analyze simulation results, debug failures, and drive root-cause resolution
• Collaborate with design, architecture, and verification teams to ensure design quality
• Develop and maintain automation scripts and regression frameworks
• Contribute to the improvement of verification methodologies and flows
• Leverage AI-assisted tools (e.g., ChatGPT, Gemini, Cursor) to enhance productivity

Required Qualifications

• Bachelor’s degree in Electrical/Electronic Engineering, Computer Science
• 8+ years of relevant industry experience
• Strong expertise in RTL verification methodologies , including System Verilog
• Experience with ASIC verification flows and design verification methodologies
• Proficiency in UVM/OVM , Python, C/C++ , and scripting
• Experience with block-level and system-level verification
• Strong debugging and problem-solving skills
• Ability to analyze and resolve complex verification trade-offs
• Excellent communication and teamwork skills

Preferred Qualifications

• Experience with firmware development or embedded C
• Knowledge of PHY layers and adaptation techniques
• Familiarity with formal verification methodologies
• Understanding of chip design flows and tools
• Knowledge of CPU, DDR, bus, network protocols, or DSP design
• Experience with AI-assisted development tools

Compensation and Benefits

The annual base salary range for this position is USD 121,900.00 To USD 195,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Welcome! Thank you for your interest in Broadcom!

We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.

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