Technical Lead, VLSI Physical Design – High-Speed Cores

AMD; Fort Collins (CO); On-site; USD 140,000 - 210,000; Full time

Job summary

AMD in Fort Collins, CO is seeking an experienced VLSI physical design engineer to lead and contribute to the next generation FPUs and caches. You will work with RTL and physical designers to optimize timing, power, and area, and mentor junior engineers in a fast-paced, cross-site Core's organization.

Applicants should have a strong track record in high‑speed VLSI, Verilog RTL, and design for performance, with a BS/MS in EE/CS and 8+ years hardware experience.

Qualifications

• 8+ years hardware design experience in VLSI and chip development.
• Strong knowledge of computer architecture and design tradeoffs.
• Familiarity with floor planning, placement, routing, and timing analysis.
• Experience with Verilog RTL and timing/power optimization.

Responsibilities

• Technical lead for high-speed VLSI design in deep submicron processes.
• Collaborate with RTL and physical designers across sites to optimize power, performance, area, and schedule.
• Create technical presentations for peers and management.
• Mentor junior engineers.

Skills

VLSI design

Hardware design

Verilog RTL

C

Perl

Tcl

Education

BS/MS in EE or CS

Job description

AMD in Fort Collins, CO is seeking an experienced VLSI physical design engineer to lead and contribute to the next generation FPUs and caches. You will work with RTL and physical designers to optimize timing, power, and area, and mentor junior engineers in a fast-paced, cross-site Core's organization.

Applicants should have a strong track record in high‑speed VLSI, Verilog RTL, and design for performance, with a BS/MS in EE/CS and 8+ years hardware experience.