Technical Director (Chip Design)

Oho Group

San Francisco (CA)

Sur place

USD 260 000 - 380 000

Plein temps

Il y a 33 heures
Soyez parmi les premiers à postuler
Générateur de candidature

Une candidature complète en une minute — un CV et une lettre de motivation personnalisés, prêts à envoyer.

Passez les filtres ATS

Résumé du poste

Oho Group is partnering with a stealth-mode semiconductor startup in the San Francisco Bay Area to hire a Technical Director who will own architecture and end-to-end design of a key SoC subsystem.

You'll mentor engineers, shape technical direction, collaborate with RTL, microarchitecture, verification and physical design teams, and oversee the full chip development lifecycle from architecture to tapeout in a fast-paced environment.

Qualifications

  • Proven experience leading complex ASIC/SoC development with multiple successful tapeouts.
  • Strong background in memory, compute, interconnect or other complex SoC subsystems.
  • Hands-on leadership in early-stage hardware startups.
  • Ability to establish engineering standards and best practices.
  • Experience with RTL, microarchitecture, verification and physical design teams.

Responsabilités

  • Own the architecture and end-to-end design of a critical SoC subsystem.
  • Drive technical direction, engineering standards and design methodologies.
  • Mentor engineers and help build out a high-calibre hardware team.
  • Take ownership across full chip development lifecycle from architecture through tapeout.
  • Collaborate with RTL, microarchitecture, verification and physical design teams.

Connaissances

SoC architecture
ASIC/SoC development
RTL verification
Memory subsystems
Interconnect
Team leadership
Tapeout
Physical design

Description du poste

Technical Director - Stealth AI Silicon Startup

We have partnered with a stealth-mode semiconductor startup based in the Bay Area that is developing next-generation silicon for AI and high-performance computing.

We’re looking for a director-level engineer to take technical ownership across architecture and design, working within a small, highly experienced team. You’ll help shape the technical direction of the silicon, establish engineering best practices and build out the team as the company scales, while remaining hands-on technically.

Key responsibilities and requirements
  • Own the architecture and end-to-end design of a critical SoC subsystem
  • Work closely with RTL, microarchitecture, verification and physical design teams
  • Drive technical direction, engineering standards and design methodologies
  • Mentor engineers and help build out a high-calibre hardware team
  • Take ownership across the full chip development lifecycle, from architecture through to tapeout
  • Proven experience leading complex ASIC/SoC development across multiple successful tapeouts
  • Strong background in memory, compute, interconnect or other complex SoC subsystems
  • Comfortable operating in an early-stage environment with significant technical ownership

Whether you've helped build a semiconductor startup from an early stage or are looking to take a step beyond one of the larger semiconductor companies, this is an opportunity to have significant influence over both the technology and the team.

Obtenez votre examen gratuit et confidentiel de votre CV.

ou faites glisser et déposez votre fichier ici.

Similar jobs

Postes similaires à comparer

SoC Architecture Director — AI Silicon Startup
SoC Architecture Director — AI Silicon Startup

Oho Group • San Francisco (CA)

Sur place
USD 260 000 - 380 000
Lead Hardware Architect
Lead Hardware Architect

Oho Group • San Francisco (CA)

Sur place
USD 180 000 - 260 000
Lead SoC Architect
Lead SoC Architect

Oho Group • San Francisco (CA)

Sur place
USD 360 000 - 450 000
Director of Physical Design
Director of Physical Design

Oho Group • San Francisco (CA)

À distance
USD 180 000 - 280 000
VP, Silicon Engineering - AI
VP, Silicon Engineering - AI

SBT • Austin (TX)

Sur place
USD 250 000 - 450 000
Implementation Lead
Implementation Lead

Oho Group • San Francisco (CA)

Sur place
USD 200 000 - 260 000
Chip Design Engineer
Chip Design Engineer

TenX Semi • San Francisco (CA)

Sur place
USD 140 000 - 210 000
SVP, SoC Architecture (AI)
SVP, SoC Architecture (AI)

SBT • San Francisco (CA)

Sur place
USD 250 000 - 360 000
Silicon Engineer for AI Hardware Co-Design
Silicon Engineer for AI Hardware Co-Design

Anthropic • San Francisco (CA)

Hybride
USD 320 000 - 485 000
Equity donation matching
Generous vacation
Parental leave
+2
Lead ASIC Design Engineer
Lead ASIC Design Engineer

Oho Group • San Jose (CA)

Sur place
USD 180 000 - 260 000