System on Chip Architect

5 Star Recruitment; Salt Lake City (UT); On-site; USD 180,000 - 240,000; Full time

Job summary

A leading recruitment firm is seeking a Technical Lead for ASIC systems based in Salt Lake City, Utah. The role involves leading a cross-functional team in designing a RISC-V ASIC product and liaising with technical stakeholders. Candidates should have over 8 years of ASIC design experience, strong RTL coding skills (Verilog/VHDL), and a Bachelor’s degree in a relevant field. A US Citizenship is a must for this role.

Qualifications

• More than 8 years of ASIC design and architecture experience.
• Proven work experience designing and fabricating an ASIC.
• Strong proficiency in RTL coding (Verilog or VHDL), ASIC design flow, and EDA tools.
• Experience with RTL synthesis, place-and-route, timing closure, and verification.
• Strong problem-solving skills and cross-functional leadership.

Responsibilities

• Lead a team to design and develop a RISC-V ASIC System on a Chip product.
• Define and document product features and functional requirements.
• Oversee implementation of a comprehensive verification strategy.
• Develop and oversee a comprehensive verification strategy including testbench development, functional and performance verification.
• Evaluate new ASIC technologies and design methodologies for potential adoption.
• Prioritize and schedule a product roadmap aligned with market needs and competitive advantage.
• Decompose the plan into actionable tasks, including design reviews and demonstrations.

Skills

ASIC design and architecture

RTL coding (Verilog or VHDL)

Cross-functional leadership

Digital logic design

Problem-solving skills

Education

BS in Computer Engineering, Computer Science, Electrical Engineering or related field

Tools

EDA tools

EDA tools

Job description

• Be the technical lead of a cross‑functional team (hardware engineering, software developers, verification engineers) to define, design, simulate, fabricate and iterate a RISC‑V Application‑Specific Integrated Circuit (ASIC) System on an Chip (SoC) product for defense and commercial applications based on our client's secure RISC‑V CPU. The RTL already exists; the major task is transferring that capability to a functioning, production‑ready ASIC. Tasks ahead will follow the latest industry‑standard design methodologies to finalize the RTL code, synthesis, place‑and‑route and verification.
• Be the primary technical interface with pilot customers, the internal engineering team and external subcontracted specialists to define and document product features, use cases, and functional requirements.
• Finalize and maintain the microarchitecture definition and associated documentation (complete ASIC specification, requirements and verification plan), including performance, I/O, power consumption, area utilization, recurring cost and security functionality.
• Develop and oversee the implementation of a comprehensive verification strategy including testbench development, functional verification and performance verification. Ensure the verification team has adequate coverage and highest probability of first‑pass success.
• Continuously evaluate new ASIC technologies, design methodologies for possible incorporation into the design.
• Prioritize and schedule a product roadmap that defines the inclusion of technical features to align with timing of market need and competitive advantage.
• Decompose the product plan into actionable and trackable tasks, including design reviews and demonstrations the team can execute.
• Identify strategic partners to assist in the development, marketing, and sustainment of the product to augment internal capabilities.

Required Qualifications & Experience

• Must have proven work experience designing and fabricating an ASIC.
• More than 8 years of ASIC design and architecture experience is required.
• Solid technical background with understanding and/or hands‑on experience in ASIC product development.
• At minimum a BS in Computer Engineering, Computer Science, Electrical Engineering or related field.
• Strong proficiency in RTL coding (Verilog or VHDL), ASIC design flow, and EDA tools.
• In‑depth knowledge of ASIC architectures, including digital logic design, clocking methodologies, and low‑power design techniques.
• Experience with industry‑standard ASIC design methodologies (e.g., RTL synthesis, place‑and‑route, timing closure) and verification methodologies (e.g., UVM, SystemVerilog).
• Strong problem‑solving skills and willingness to roll up one’s sleeves to get the job done.

Preferred Qualifications & Experience

• US Security Clearance, Active or current within the last two years.
• In‑depth understanding of microprocessor market and processor architectures.
• Working knowledge of applied cryptography and cyber security topics.
• Experience applying principles of cyber security to operational technology and embedded systems.

Required Citizenship / Work Permit / Visa Status

Must be a US Citizen.

Must‑Haves

• Education/qualification: BS in Computer Engineering, Computer Science, Electrical Engineering, or related field.
• Minimum Relevant Experience:
  • More than 8 years of ASIC design and architecture experience.
  • Experience designing and fabricating an ASIC.
  • Strong proficiency in RTL coding (Verilog or VHDL), ASIC design flow, and EDA tools.
  • Expert in processor architectures.
  • Cross‑functional leadership in designing and fabricating RISC‑V ASIC SoC.