Standard Cell Design Lead: Library & Timing Expert

Substrate Inc.; San Francisco (CA); On-site; USD 150,000 - 275,000; Full time

Benefits offered by this job

Restaurant

Job summary

Substrate Inc. is seeking a Standard Cell Design Lead to develop and optimize standard cell libraries, lead characterization, and ensure library validation across distributed design and fabrication partners.

This on-site role requires deep expertise in digital cell design, layout, timing characterization, and near-datacenter collaboration with PDK teams. You will drive gate-level library development, optimize for power, performance and area, and coordinate with external fabrication facilities to

Qualifications

• 10+ years experience in standard cell design, library development and characterization.
• Deep understanding of standard cell architecture, layout, and optimization strategies.
• Strong background in cell characterization and Liberty timing model generation.
• Experience with layout tools (Cadence Virtuoso, Synopsys Custom Compiler, or similar).
• Proficiency with characterization tools and SPICE simulation for timing/power analysis.
• Proven ability to balance area, performance, and power trade-offs in cell design.

Responsibilities

• Lead standard cell library development including logic gates, flip-flops, and complex cells
• Optimize cell layouts for power, performance and area across Vth’s and drive strengths
• Characterize cell library including timing, power, and noise analysis for library models
• Develop Liberty (.lib) timing files and LEF physical abstractions for EDA tool integration
• Collaborate with PDK and process teams to ensure cell performance meets targets
• Implement DFM techniques and validate cells against DRC/LVS rules
• Support all DFT fault models including cell aware, physical aware, stuck-at and transition
• Optimize cell architectural requirements including multi-Vt and multi-channel options
• Lead library validation and qualification across distributed design and fabrication teams

Skills

Standard cell design

Library development

Cell characterization

Timing characterization

Power-area trade-offs

Education

Advanced degree in Electrical Engineering

Tools

Cadence Virtuoso

Synopsys Custom Compiler

Job description

Substrate Inc. is seeking a Standard Cell Design Lead to develop and optimize standard cell libraries, lead characterization, and ensure library validation across distributed design and fabrication partners.

This on-site role requires deep expertise in digital cell design, layout, timing characterization, and near-datacenter collaboration with PDK teams. You will drive gate-level library development, optimize for power, performance and area, and coordinate with external fabrication facilities to