Staff SoC RTL Engineer for Edge AI and IP Integration

quadric.io, Inc; Burlingame (CA); On-site; USD 175,000 - 230,000; Full time

Benefits offered by this job

Medical, dental, and vision insurance

Equity

401(k) Retirement Plan

Paid parental leave

Flexible PTO

Catered lunch in office

Job summary

Quadric is building a revolutionary processor-based SoC architecture in Burlingame, CA. As a Staff SoC RTL Engineer, you will own subsystem development, integrate third‑party IP, and drive PPA optimization across the design and tapeout lifecycle.

This role offers hands-on front-end work with SystemVerilog/Verilog, architecture definition, timing closure, and collaboration in a fast-growing edge AI company.

Qualifications

• 5+ years hands-on SoC/ASIC front-end design and integration experience.
• Proficiency in SystemVerilog or Verilog and deep technical knowledge in at least one subsystem.
• Experience with SoC subsystems and third-party IP and VCS/Verilog/C co-simulation.

Responsibilities

• Own SoC-level subsystem development and integration with third-party IP.
• Define architecture with application requirements and drive PPA optimization.
• Contribute to timing closure across front-end, back-end, and tapeout stages.
• Package and deliver design releases for customer evaluation.

Skills

SystemVerilog/Verilog

Computer architecture

Low-power design

SoC subsystems

Education

BS/MS/PhD in Electrical/Computer Engineering or related field

Tools

VCS

Verilog/C co-simulation

Job description

Quadric is building a revolutionary processor-based SoC architecture in Burlingame, CA. As a Staff SoC RTL Engineer, you will own subsystem development, integrate third‑party IP, and drive PPA optimization across the design and tapeout lifecycle.

This role offers hands-on front-end work with SystemVerilog/Verilog, architecture definition, timing closure, and collaboration in a fast-growing edge AI company.