IC Layout Engineering Intern

Qorvo, Inc.; Richardson (TX); Presencial; USD 43.000 - 58.000; A tiempo parcial

Descripción de la vacante

Qorvo in Richardson, TX is offering an IC Layout Engineering Internship for students pursuing a Bachelor's or Master’s degree in Electrical/Computer Engineering or Physics. This role provides real work experience, mentorship, and exposure to upper management as part of the High Performance Analog group.

You will complete physical implementation of RF, analog, and mixed signal circuit blocks, learn foundry PDK rules, support floor planning, perform layout edits with Cadence Virtuoso, run

Formación

• Pursuing Bachelor’s or Master’s in Electrical Engineering, Computer Engineering, Physics, or related.
• Minimum GPA 3.0 or equivalent.
• Basic understanding of semiconductor devices and integrated circuits.
• Coursework in analog circuits, digital circuits, VLSI design, semiconductor devices, or microelectronics.
• Strong analytical, problem solving, written and verbal communication skills.
• Ability to work collaboratively in a team environment.
• Coursework or projects involving IC physical design or VLSI layout.
• Familiarity with Cadence Virtuoso or similar IC design tools.
• Basic knowledge of Linux operating systems.
• Exposure to scripting languages such as Python, SKILL, Perl, or Shell scripting.
• Understanding of layout verification concepts such as DRC and LVS.

Responsabilidades

• Complete physical implementation of RF, analog, and mixed signal circuit blocks.
• Learn and apply foundry PDK design rules and layout methodologies.
• Support block level floor planning and device placement activities.
• Perform layout edits using Cadence Virtuoso and other industry standard EDA tools.
• Execute basic verification checks including DRC, LVS, and ERC.
• Participate in debugging and resolving verification issues.
• Assist in maintaining clean and organized version control practices.
• Document layout activities, verification results, and project milestones.
• Tapeout activities, including generation of GDS files and documentation packages.
• Learn about different semiconductor technologies (GaAs, Silicon, and GaN) and best practices such as matching, symmetry, shielding, guard rings, and routing techniques.
• Participate in technical reviews, team meetings, and engineering training sessions.

Conocimientos

Electrical Engineering

Problem solving

Team collaboration

Analytical skills

Linux basics

Python

Cadence Virtuoso

IC layout concepts

VLSI design

DRC/LVS/ERC verification

Educación

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Physics, or related

GPA 3.0 or equivalent

Herramientas

Cadence Virtuoso

Linux OS

Python

Perl

Shell scripting

Descripción del empleo

IC Layout Engineering Intern

Experience Level: Support

Job Type: Intern

Location: Richardson, TX, US, 75081

Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense. Visit www.qorvo.com to learn how our innovative team is helping connect, protect and power our planet.

Qorvo’s Internship Program is designed for college students currently enrolled in an accredited Bachelor’s, Master’s, or PhD program. Qorvo offers real work experience, exposure to upper management, and the opportunity to pursue full-time opportunities, as available.

Qorvo’s Internship Program offers:

• Challenging, skill-building assignments
• Mentoring and coaching from industry experts
• Launch & Learns and other learning opportunities
• Collaborative team-based work environment
• Networking and social events
• Final presentation to business leaders

Qorvo’s IC Layout Engineer Internships are offered in our High Performance Analog business group. Specific projects and responsibilities will be determined based on the business needs at the time of the internship assignment.

Responsibilities may include:

• Complete physical implementation of RF, analog, and mixed signal circuit blocks.
• Learn and apply foundry PDK design rules and layout methodologies.
• Support block level floor planning and device placement activities.
• Perform layout edits using Cadence Virtuoso and other industry standard EDA tools.
• Execute basic verification checks including DRC, LVS, and ERC.
• Participate in debugging and resolving verification issues.
• Assist in maintaining clean and organized version control practices.
• Document layout activities, verification results, and project milestones.
• Tapeout activities, including generation of GDS files and documentation packages.
• Learn about different semiconductor technologies (GaAs, Silicon, and GaN) and best practices such as matching, symmetry, shielding, guard rings, and routing techniques.
• Participate in technical reviews, team meetings, and engineering training sessions.

Qualifications

• Currently pursuing a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Physics, or a related technical discipline.
• Minimum GPA of 3.0 or equivalent academic standing.
• Basic understanding of semiconductor devices and integrated circuits.
• Coursework in analog circuits, digital circuits, VLSI design, semiconductor devices, or microelectronics.
• Strong analytical, problem solving, written and verbal communication skills.
• Ability to work collaboratively in a team environment.
• Coursework or projects involving IC physical design or VLSI layout.
• Familiarity with Cadence Virtuoso or similar IC design tools.
• Basic knowledge of Linux operating systems.
• Exposure to scripting languages such as Python, SKILL, Perl, or Shell scripting.
• Understanding of layout verification concepts such as DRC and LVS.

This position is not eligible for visa sponsorship by the Company.

Competitive hourly pay commensurate with experience: $31/hr - $42/hr (subject to change dependent on physical location)

Posted salary ranges are made in good faith. Qorvo reserves the right to adjust ranges depending on the experience/qualification of the selected candidate as well as external competitiveness and internal comparability.

Base compensation is one element of Total Rewards offered at Qorvo. More information on the Total Rewards package can be shared upon request.

MAKE A DIFFERENCE AT QORVO

We are Qorvo. We do more than create innovative RF and Power solutions for the mobile, defense and infrastructure markets - we are a place to innovate and shape the future of wireless communications. It starts with our employees. As a unified global team, we bring a commitment to excellence, growth and a passion for creating what's next. Explore the possibilities with us.

We are an Equal Employment Opportunity (EEO) employer and welcome all qualified applicants. Applicants will receive fair and impartial consideration without regard to any characteristics protected by applicable law, including race, color, religion, sex (as defined by law), national origin, age, military or veteran status, genetic information, or disability.