Staff SoC Debug Engineer: Platform Bring-Up & Root Cause

Qualcomm; Santa Clara (CA); On-site; USD 146,000 - 218,000; Full time

Job summary

Qualcomm Technologies, Inc. in Santa Clara, CA, seeks a Senior SoC Debug Engineer for Silicon Validation to ensure quality across server, compute and mobile chipsets.

Collaborate with architects and verification teams to diagnose complex pre-Si and post-Si issues. You will lead bring-up, RTL inspection, and debugging using JTAG and lab equipment, and design strategies to triage failures, perform real-time analysis, and drive corrective actions to improve reliability.

Qualifications

• 6+ years in pre-si and post-silicon debug on embedded platforms.
• RTL inspection and basic RTL understanding.
• Experience solving complex pre-si/post-si debug scenarios.
• Lead efforts for faster platform-level debugging and triage.
• Develop debug strategies for partners including PVT and margin issues.
• SysDebug lead roles to drive complex issues to root-cause.
• Debugging low-level software and hardware issues, JTAG tools, lab equipment use.

Responsibilities

• Lead bring-up, debug, and analysis of embedded platforms in pre-Si and post-Si phases.
• Perform RTL inspection and root-cause analysis for pre-Si and post-Si issues.
• Lead initiatives for faster platform-level debug and isolation of components.
• Create and lead debug strategies and plans for partners to triage failures.
• Real-time debugging of server hardware: motherboards, CPUs, memory, storage, power, networking.
• Investigate manufacturing defects and implement corrective actions to improve quality.

Skills

RTL inspection

JTAG debugging

Embedded debug

Root-cause analysis

Lab tools

Python scripting

Server/CPU architectures

Debug strategies

Education

Master's in CE/EE

Bachelor's + 4+ years ASIC

PhD considered

Tools

JTAG

Logic Analyzer

Oscilloscope

Signal Generator

Job description

Qualcomm Technologies, Inc. in Santa Clara, CA, seeks a Senior SoC Debug Engineer for Silicon Validation to ensure quality across server, compute and mobile chipsets.

Collaborate with architects and verification teams to diagnose complex pre-Si and post-Si issues. You will lead bring-up, RTL inspection, and debugging using JTAG and lab equipment, and design strategies to triage failures, perform real-time analysis, and drive corrective actions to improve reliability.