Senior SoC Debug & Automation Engineer

QUALCOMM, Inc.

San Diego (CA)

Vor Ort

USD 122.000 - 183.000

Vollzeit

Vor 8 Tagen

Eine vollständige Bewerbung in einer Minute

Maßgeschneiderter Lebenslauf und Anschreiben – versandbereit.

Schaffe es an den ATS-Filtern vorbei

Zusammenfassung

Qualcomm Technologies, Inc. is seeking a Senior SoC Debug Engineer to join the Silicon Validation team.

This role focuses on bring up, debug, and analysis of failures at the embedded platform level across pre-Si and post-Si phases, collaborating with architects, designers, verification and software engineers. You will develop debug strategies, implement solutions for faster debugging, and guide partners to triage issues including PVT and marginality concerns.

Qualifikationen

  • 5 to 8 years of experience with pre-si and post-silicon enabling, bring-up, analyze failures at the embedded platform level.
  • RTL inspection and understanding of basic RTL.
  • Gen AI knowledge and experience for automating the Debug flow.
  • Debugging low level software and hardware issues.

Aufgaben

  • Bring up, debug, analyze failures at the embedded platform level in both pre-Si and post-Si phase.
  • Support, develop, and implement solutions for faster debug at the platform level including isolating failing components of a system.
  • Creating debug strategies and plans for partners to more rapidly triage failures to isolate specific components including PVT and marginality issues.
  • Gen AI automation and enablement for automating the Debug flow.

Kenntnisse

ASIC design
RTL understanding
Gen AI for debugging
Debugging hardware/software
JTAG
Lab equipment usage

Ausbildung

Bachelor's degree in Science/Engineering
Master's degree in Science/Engineering
PhD in Science/Engineering

Tools

Logic Analyzer
Scope
Signal Generator

Jobbeschreibung

Qualcomm Technologies, Inc. is seeking a Senior SoC Debug Engineer to join the Silicon Validation team.

This role focuses on bring up, debug, and analysis of failures at the embedded platform level across pre-Si and post-Si phases, collaborating with architects, designers, verification and software engineers. You will develop debug strategies, implement solutions for faster debugging, and guide partners to triage issues including PVT and marginality concerns.

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