Staff FPGA Engineer - Lead Digital Hardware & Firmware

Northrop Grumman; Warner Robins (GA); On-site; USD 168,000 - 252,000; Full time

Benefits offered by this job

Overtime eligibility

Discretionary bonus

Health insurance

Job summary

Northrop Grumman Defense Systems Sector is seeking a Staff Digital Engineer in Warner Robins, GA to lead digital design across FPGAs, CPLDs, and ASICs for sustainment and modernization programs. The role requires on-site work daily and close collaboration with cross-functional teams.

The ideal candidate will have extensive experience in digital design, modeling and simulation, and firmware integration, with a DoD Secret clearance or the ability to obtain one.

Qualifications

• BS in Electrical Engineering from ABET-accredited school with extensive relevant experience
• Experience leading FPGA evaluation, programming and testing for complex systems
• Subject matter expertise in advanced digital design including FPGAs
• Experience developing simulation frameworks and test benches
• Experience integrating firmware with software and hardware
• Experience with Xilinx product line and development tools
• Experience in aviation and/or DoD programs
• Must hold or be able to obtain DoD Secret clearance

Responsibilities

• Lead design and development of digital circuits and systems (FPGAs, CPLDs, ASICs)
• Define system requirements and select components based on reliability
• Use modeling/simulation tools to accelerate firmware testing
• Collaborate with hardware, software and systems engineers on integrated solutions
• Implement rigorous testing and validation of digital designs
• Mentor junior engineers in digital design and firmware

Skills

FPGAs

CPLDs

ASICs

Digital circuits

Simulation

Firmware

Hardware integration

Mentoring

Education

ABET-accredited B.S. in Electrical Engineering

Advanced degree (MS/PhD)

Tools

Xilinx tools

MATLAB

Job description

Northrop Grumman Defense Systems Sector is seeking a Staff Digital Engineer in Warner Robins, GA to lead digital design across FPGAs, CPLDs, and ASICs for sustainment and modernization programs. The role requires on-site work daily and close collaboration with cross-functional teams.

The ideal candidate will have extensive experience in digital design, modeling and simulation, and firmware integration, with a DoD Secret clearance or the ability to obtain one.