Staff Engineer, Memory Systems Architect (RAS & Fault Mgmt)

Samsung Semiconductor; San Jose (CA); On-site; USD 163,000 - 253,000; Full time

Benefits offered by this job

Incentive opportunities

Medical/Dental/Vision

401(k)

On-site café and gym

Mental health apps and therapy sessions

Job summary

Samsung Semiconductor is looking for a Staff Engineer in Memory Systems Architecture at their San Jose location. The role requires a Bachelor’s with 10+ years of experience or a Master’s with 8+ years, focusing on hardware fault management and DRAM failure rate solutions. Responsibilities include developing memory fault management algorithms and working with customers on ECC schemes. Samsung provides competitive benefits, inclusive workplace policies, and a base pay range of $163,000 to $253,000 USD.

Qualifications

• 10+ years of relevant industry experience in hardware fault management.
• Knowledge of platform memory subsystem and RAS such as ECC.
• Experience with Linux kernel commit.
• Understanding of DRAM and HBM failure modes.

Responsibilities

• Recommend solutions to mitigate field DRAM failure rate.
• Communicate ECC scheme to customers based on DRAM failure mode.
• Establish value add of in‑field fault management architecture.

Skills

Hardware fault management

Data center fleet management

ECC design and verification

Collaborative skills

Innovative and creative approach

Education

Bachelor’s degree with 10+ years of industry experience

Master’s with 8+ years or PhD with 5+ years

Job description

Samsung Semiconductor is looking for a Staff Engineer in Memory Systems Architecture at their San Jose location. The role requires a Bachelor’s with 10+ years of experience or a Master’s with 8+ years, focusing on hardware fault management and DRAM failure rate solutions. Responsibilities include developing memory fault management algorithms and working with customers on ECC schemes. Samsung provides competitive benefits, inclusive workplace policies, and a base pay range of $163,000 to $253,000 USD.