Staff Engineer, Memory Systems Architecture

Samsung Semiconductor

San Jose (CA)

On-site

USD 163,000 - 253,000

Full time

14 days+

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Benefits offered by this job

Incentive opportunities
Medical/Dental/Vision
401(k)
On-site café and gym
Mental health apps and therapy sessions

Job summary

Samsung Semiconductor is looking for a Staff Engineer in Memory Systems Architecture at their San Jose location. The role requires a Bachelor’s with 10+ years of experience or a Master’s with 8+ years, focusing on hardware fault management and DRAM failure rate solutions. Responsibilities include developing memory fault management algorithms and working with customers on ECC schemes. Samsung provides competitive benefits, inclusive workplace policies, and a base pay range of $163,000 to $253,000 USD.

Qualifications

  • 10+ years of relevant industry experience in hardware fault management.
  • Knowledge of platform memory subsystem and RAS such as ECC.
  • Experience with Linux kernel commit.
  • Understanding of DRAM and HBM failure modes.

Responsibilities

  • Recommend solutions to mitigate field DRAM failure rate.
  • Communicate ECC scheme to customers based on DRAM failure mode.
  • Establish value add of in‑field fault management architecture.

Skills

Hardware fault management
Data center fleet management
ECC design and verification
Collaborative skills
Innovative and creative approach

Education

Bachelor’s degree with 10+ years of industry experience
Master’s with 8+ years or PhD with 5+ years

Job description

Samsung Semiconductor is hiring now for a Staff Engineer, Memory Systems Architecture.

Location

Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work Policy.

What You'll Do
  • Based on knowledge of SOC controller and memory operation including RAS feature, find and recommend better solutions to mitigate field DRAM failure rate.
  • Communicate better ECC scheme to customers based on Samsung DRAM failure mode (DQ and burst).
  • Interface with customers to establish the value add of enabling in‑field fault management architecture.
  • Contribute to the standardization of DRAM/HBM failure logging in the OCP.
  • Propose and develop platform RAS algorithms for memory fault management such as page offlining, hPPR and conduct POC with known failure DIMMs in real server and application.
What You Bring
  • Bachelor’s degree with 10+ years of relevant industry experience, or Master’s with 8+ years, or PhD with 5+ years in hardware fault management, reliability, data center fleet management or related technical field.
  • Knowledge of platform memory subsystem, platform RAS such as ECC, page offlining, hPPR and hardware sparing.
  • ECC design and verification and reverse engineering experience.
  • Understanding of address mapping between CPU and memory.
  • Memory controller register modification experience.
  • Linux kernel commit experience.
  • DRAM and HBM failure mode understanding.
  • Inclusive, adapting your style to diverse global norms.
  • Avid learner, approaching challenges with curiosity and resilience.
  • Collaborative, building relationships, offering support and welcoming new approaches.
  • Innovative and creative, proactively exploring new ideas and adapting quickly to change.
What We Offer

Base Pay Range: $163,000—$253,000 USD.

Benefits include incentive opportunities, medical/dental/vision, 401(k), inclusive rewards plan, support for fertility care, adoption and travel, virtual vet care, on‑site café and gym, virtual classes, mental health apps and confidential therapy sessions.

Equal Opportunity Employment Policy

Samsung Semiconductor takes pride in being an equal‑opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Comprehensive accommodations are available throughout the hiring process for candidates with disabilities and long‑term conditions.

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