Staff Design Verification Engineer - HBM/DRAM for AI

Micron Technology, Inc.; Richardson (TX); Vor Ort; USD 140.000 - 180.000; Vollzeit

Zusammenfassung

Micron Technology in Richardson, Texas is seeking a Staff Design Verification Engineer to verify high-density memory designs and ensure functional correctness across full-chip and block-level scopes.

You will develop verification plans, build and maintain testbenches, improve coverage, debug complex issues, and mentor a team of verification engineers while collaborating with global design and product teams on advanced memory technologies like DDR/LPDDR and HBM.

Qualifikationen

• Bachelor's degree in Electrical or Computer Engineering.
• 7+ years of mixed-signal and/or digital verification experience.
• Strong debugging and problem-solving skills with clear communication.

Aufgaben

• Evaluate full-chip and block-level HBM/DRAM designs for functional correctness and performance.
• Develop verification plans from functional specifications with architects and design teams.
• Create, enhance, and maintain verification environments, testbenches, test vectors, and regressions.
• Increase functional coverage across DRAM architectures and features using verification tools and methodologies.
• Debug design issues, support root-cause analysis, track bugs, and drive coverage and closure.
• Collaborate with global design, verification, and product engineering teams to ensure successful project execution.
• Lead verification efforts on assigned projects and mentor verification engineers.

Kenntnisse

SystemVerilog

Assertions (SVA)

Debugging

Verification methodologies

Ausbildung

Bachelor’s degree in Electrical or Computer Engineering

Tools

HSPICE

Verilog- HDL

FINESIM

Python

Jobbeschreibung

Micron Technology in Richardson, Texas is seeking a Staff Design Verification Engineer to verify high-density memory designs and ensure functional correctness across full-chip and block-level scopes.

You will develop verification plans, build and maintain testbenches, improve coverage, debug complex issues, and mentor a team of verification engineers while collaborating with global design and product teams on advanced memory technologies like DDR/LPDDR and HBM.