Principal Engineer, Architecture & Performance Research for Data Center and Agentic AI CPU

Samsung Semiconductor Inc.; San Jose (CA); On-site; USD 219,000 - 351,000; Full time

Benefits offered by this job

Give Back

Enjoy Time Away

Care for Family

Prioritize Emotional Wellness

Stay Fit

Embrace Flexibility

Job summary

Samsung Semiconductor is hiring a Principal Engineer for Architecture & Performance Research focused on data center and agentic AI CPU workloads. The role spans workload analysis, microarchitectural innovation, and silicon validation across the full design spectrum.

You will work on RISC-V centered research, model-driven exploration, and RTL-to-silicon validation, collaborating with cross‑functional teams in a dynamic, onsite environment in San Jose.

Qualifications

• Master's degree or PhD with extensive experience in CPU architecture research.
• Strong track record in high-performance CPU design and evaluation.
• Proven ability to drive architectural direction using quantitative analysis.

Responsibilities

• Research next-gen CPU microarchitecture for data center workloads.
• Develop AI/agentic AI related architecture ideas and validate on silicon.
• Lead cross‑functional teams from modeling to RTL implementation.

Skills

CPU microarchitecture

Performance analysis

C/C++

Python

RTL implementation

Education

Master's degree in Computer Engineering

PhD in related field

Tools

gem5

RTL simulation

Job description

Please Note:

To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.

Advancing the World's Technology Together

Our technology solutions power the tools you use every day—including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future.

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.

Principal Engineer, Architecture & Performance Research Engineer for Data Center and Agentic AI CPU

What You'll Do

Architecture Research Lab is focused on researching next-generation CPU (RISC-V) microarchitecture and performance for emerging computing workloads. We explore new architectural ideas, evaluate their performance potential, and rapidly turn promising concepts into working designs that can be validated on real silicon. Our research is driven by emerging opportunities in data center and agentic AI workloads, where we investigate how CPU architecture can evolve to meet new performance and efficiency requirements. We also explore CPU‑memory co‑design from the CPU perspective, in alignment with the broader shift toward memory‑centric architectures. A distinctive aspect of our team is the way we approach architecture research. We develop and apply AI‑driven methodologies to accelerate architectural exploration, broaden the design space we can investigate, and quickly iterate from ideas to implementation and silicon validation. Rather than simply following established design flows, we continuously seek new ways to explore, evaluate, and realize CPU architectures. The role offers an opportunity to work across the full spectrum of architecture research— from workload and performance analysis, microarchitectural innovation, and architectural modeling to implementation and silicon validation—while helping shape new methodologies for how future CPUs are designed.

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

What You Bring

• Master's degree in Computer Engineering, Computer Science, or a related field with 18+ years of relevant experience, or PhD with 15+ years of relevant experience
• 5+ years of experience in CPU microarchitecture, architecture research, or performance engineering, with a demonstrated track record of driving architectural direction
• Extensive experience designing and evaluating high-performance CPU architectures, including RISC‑V, ARM, or x86 cores; experience with GPU/NPU vector or accelerator architectures is also relevant
• Proven ability to use quantitative performance analysis and modeling to identify architectural opportunities, evaluate system‑level trade‑offs, and influence major microarchitectural decisions
• Deep expertise in at least one major microarchitectural domain, with the ability to drive architectural direction and technical decisions in that area:
• Front‑end: Branch prediction, fetch/decode, instruction delivery, and decoupled front‑end architectures
• Mid‑end: Out‑of‑order execution, scheduling, RVV/SIMD, vector execution, or matrix/tensor acceleration
• Back‑end: Load/store units, MSHRs, cache and memory systems, prefetching, or irregular memory access optimization
• Hands‑on experience building, extending, and applying architectural simulators and performance models, such as gem5, to guide architecture decisions
• Strong programming skills in C/C++ and Python, with experience developing tools and automation for performance analysis and architectural exploration
• Demonstrated ability to take architectural concepts from research and modeling through RTL implementation and silicon validation

Preferred Qualifications

• Experience defining or influencing CPU architecture for emerging workloads, particularly AI/ML, agentic AI, or data center applications
• Experience with AI‑driven architecture and design methodologies, including AI‑assisted architecture exploration, high‑level design, or RTL generation
• Strong perspective on memory‑centric architectures and CPU‑memory co‑design, with experience translating memory‑system characteristics into CPU architectural opportunities
• Experience driving system‑level PPA trade‑offs across performance, power, area, and implementation complexity
• Experience taking architectural concepts through RTL implementation, tape‑out, and silicon validation
• Experience leading cross‑functional architecture initiatives and influencing technical direction across multiple engineering teams
• Proven ability to mentor and develop senior technical engineers and shape architecture research across multiple domains
• Track record of impactful architectural innovation through patents, publications, or deployed products
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• You approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change

What We Offer

The pay range below is for all roles at this level across all US locations and functions. Pay within this range varies by work location and may also depend on job‑related knowledge, skills, and experience. We also offer incentive opportunities that reward employees based on individual and company performance.

• Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.
• Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.
• Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.
• Prioritize Emotional Wellness With on‑demand apps and free confidential therapy sessions, you'll have support no matter where you are.
• Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Cafe and gym, plus virtual classes, make it easier.
• Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.

Base Pay Range

$219,000 — $351,000 USD

Equal Opportunity Employment Policy

Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status.

When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long‑term conditions, neurodivergent individuals, or those requiring pregnancy‑related support. All candidates scheduled for an interview will receive guidance on requesting accommodations.