SST Systems Architect Lead — Megawatt Power Electronics

Fluidstack

Los Angeles (CA)

On-site

USD 208,000 - 263,000

Full time

13 days ago
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Job summary

Fluidstack is seeking a senior role to own end-to-end SST program development, leading power electronics, magnetics, and controls teams toward working hardware for gigawatt-scale data centers. You will shape topology choices, semiconductor strategy, and system interfaces with MVDC teams, while coordinating partnerships with vendors and universities.

You will drive a multi-year roadmap, defend critical decisions, and participate in high-ambiguity, high-impact design challenges that push the

Qualifications

  • 15+ years in power conversion and have led an SST or MV converter program at a major research or industry lab.
  • Owned converter topology selection, semiconductor strategy, and system trade-offs at MW scale.
  • Led converter development teams from architecture to working hardware.
  • Knowledge of the SiC ecosystem to craft multi-year semiconductor strategy.
  • Able to write and defend a 12-month program plan for a team of engineers.
  • Bonus: MV transformer design depth or MVDC integration experience.

Responsibilities

  • Architect SST end-to-end and defend topology and semiconductor choices based on efficiency and manufacturability.
  • Lead the power electronics, magnetics, and controls engineers from architecture to working hardware.
  • Define interfaces with MVDC systems and document system boundaries clearly.
  • Develop the program plan and prototype roadmap, including build-vs-partner recommendations.
  • Establish vendor and university research partnerships to secure devices and test capacity.

Skills

Power conversion
SST program leadership
MV converter design
Semiconductor strategy
SiC ecosystem

Tools

MVDC systems
Power electronics

Job description

Fluidstack is seeking a senior role to own end-to-end SST program development, leading power electronics, magnetics, and controls teams toward working hardware for gigawatt-scale data centers. You will shape topology choices, semiconductor strategy, and system interfaces with MVDC teams, while coordinating partnerships with vendors and universities.

You will drive a multi-year roadmap, defend critical decisions, and participate in high-ambiguity, high-impact design challenges that push the

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