SRAM Design Engineer: AI-Driven Silicon with Equity

NVIDIA Corporation; United States; Sur place; USD 116 000 - 190 000; Plein temps

Avantages offerts par ce poste

Equity

Benefits

Résumé du poste

NVIDIA Corporation is seeking a skilled SRAM circuit designer to work within the Digital IP group. The role focuses on transistor-level SRAM design, layout supervision, and debugging SRAM macros, with emphasis on compiler development and scalable automation.

You will collaborate with SOC design partners, contribute to testing, and help prepare silicon for high-performance, cost-effective applications in real-world systems.

Qualifications

• 2+ years of professional SRAM design experience.
• Familiarity with Cadence Virtuoso schematic and layout capture tools.
• Willingness and ability to use AI effectively in day-to-day tasks.

Responsabilités

• Embedded SRAM design: transistor-level circuit design, layout verification, and debug of SRAM macros.
• SRAM compiler development: automate assembly and validation of SRAM macros using compute resources.
• Explore future process nodes and develop techniques for optimal power, performance, and area.
• Guide SOC design, silicon test, and productization with partners.

Connaissances

SRAM design

AI tools usage

Cadence tooling

Formation

BSEE / MSEE or PhD

Outils

Cadence Virtuoso

Description du poste

NVIDIA Corporation is seeking a skilled SRAM circuit designer to work within the Digital IP group. The role focuses on transistor-level SRAM design, layout supervision, and debugging SRAM macros, with emphasis on compiler development and scalable automation.

You will collaborate with SOC design partners, contribute to testing, and help prepare silicon for high-performance, cost-effective applications in real-world systems.