Sr. Staff Silicon Development Engineer

Advanced Micro Devices; San Jose (CA); Hybrid; USD 110,000 - 150,000; Full time

Job summary

AMD in San Jose, CA, is seeking a front-end design/integration engineer within the Radeon Technologies Group to help bring to life cutting-edge silicon designs. You will work with architecture, IP design, Physical Design, and product engineers to achieve first pass silicon success.

The role requires meticulous, detail-oriented candidates with strong communication, problem-solving skills and experience with DFT methodologies, scan insertion, ATPG, and verification, contributing to successful

Qualifications

• Bachelor's or master's degree in computer engineering or electrical engineering.
• Experience with Design for Test methodologies and DFT verification.
• Ability to work with cross-functional teams and meet bring-up milestones.

Responsibilities

• Implementation and verification of DFT architecture and features
• Scan insertion and ATPG pattern generation
• ATPG patterns verification with gate-level simulation
• Test coverage and test cost reduction analysis
• Post silicon support to ensure successful bring up and enhance yield learning

Skills

DFT verification

Scan insertion

ATPG pattern generation

Verilog RTL design

VCS simulation

Perl/Shell scripting

Problem solving

Education

Bachelor's or master's degree in Computer Engineering / Electrical Engineering

Tools

Mentor TestKompress

Synopsys Tetramax/DFTMAX

VCS

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.

Whetheryou’redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger— technologythat moves the world forward.Join us and, together, we’ll advance your career.

THE ROLE:

As a member of the Radeon Technologies Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.

THE PERSON:

A successful candidate will work with senior silicon design engineer(s). The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

KEY RESPONSIBILITIES:

• Implementation and verification of DFT architecture and features
• Scan insertion and ATPG pattern generation
• ATPG patterns verification with gate-level simulation
• Test coverage and test cost reduction analysis
• Post silicon support to ensure successful bring up and enhance yield learning

PREFERRED EXPERIENCE:

• Understanding of Design for Test methodologies and DFT verification experience (e.g. IEEE1500, JTAG 1149.x, Scan, memory BIST etc.).
• Experience with Mentor testkompress and/or Synopsys Tetramax/DFTMAX
• Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design

ACADEMIC CREDENTIALS:

• Bachelor's or master's degree in computer engineering/Electrical Engineering

LOCATION:

San Jose, CA (Hybrid)

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Benefits offered are described: AMD benefits at a glance.

AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.