Sr. Physical Design Engineer, Annapurna Labs

Amazon Web Services (AWS); Austin (TX); On-site; USD 120,000 - 160,000; Full time

Job summary

An established industry player is seeking a skilled Sr. Physical Design Engineer to join their innovative team. This role involves optimizing hardware design for cutting-edge data center technologies, focusing on high-quality implementation and collaboration. You will lead critical physical design tasks, work closely with talented engineers, and contribute to the development of advanced machine learning acceleration systems. If you have a strong background in ASIC design and are passionate about technology, this is an exciting opportunity to make a significant impact in a dynamic environment.

Qualifications

• 8+ years of ASIC Physical Design experience from RTL to GDSII.
• Deep understanding of sign-off activities including timing and physical verification.

Responsibilities

• Lead physical implementation tasks including synthesis and place & route.
• Collaborate with RTL designers on architectural feasibility and trade-offs.

Skills

ASIC Physical Design

RTL to GDSII

EDA Tools (Cadence, Mentor Graphics, Synopsys)

Scripting (Tcl, Perl, Python)

Device Physics

Education

BSc in Electrical Engineering or Computer Science

MSc in Electrical Engineering or Computer Science

Tools

Cadence

Mentor Graphics

Synopsys

Job description

Sr. Physical Design Engineer, Annapurna Labs

Join to apply for the Sr. Physical Design Engineer, Annapurna Labs role at Amazon Web Services (AWS)

Job Description

Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world. We have data center locations in the U.S., Europe, Singapore, and Japan, and customers across all industries.

We are seeking an ASIC Physical Design Engineer to join the Cloud-Scale Machine Learning Acceleration team. You will be responsible for the design and optimization of hardware in our data centers, including AWS Inferentia and Trainium Systems, focusing on high-quality design, technological innovation, and effective trade-offs.

Key Responsibilities

• Collaborate with RTL/logic designers on architectural feasibility, exploring power-performance-area tradeoffs for physical design closure
• Lead physical implementation tasks: synthesis, floor planning, bus/pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, ECO, and sign-off
• Develop and refine physical design methodologies
• Assess third-party IP and provide strategic recommendations
• Foster teamwork and collaboration within a start-up like environment, working closely with physical design and RTL/architecture teams

Qualifications

Basic Qualifications:

• BSc + 8 years or MSc + 6 years in EE/CS
• 6+ years in ASIC Physical Design from RTL to GDSII in 7nm, 14/16nm, 20nm, or 28nm technologies
• Experience with EDA tools (Cadence, Mentor Graphics, Synopsys) for synthesis, verification, floor planning, place and route, etc.
• Deep understanding of sign-off activities including timing, IR/EM, and physical verification
• Scripting skills in Tcl, Perl, or Python

Preferred Qualifications:

• Expertise in developing CAD flows for synthesis, verification, and physical implementation
• 4+ years experience integrating IP and defining IP requirements in physical design
• Strong knowledge of device physics and implementation techniques
• Experience with physical design challenges across various technologies such as DDR, PCIe, fabrics
• Ability to mentor junior engineers and demonstrate leadership aligned with Amazon’s principles

Amazon is an equal opportunity employer committed to diversity and inclusion. For accommodations during the application process, please visit our website. Compensation varies based on location, experience, and skills, with comprehensive benefits offered.