Sr. Physical Design Engineer, Annapurna Labs

Amazon; Austin (TX); On-site; USD 90,000 - 150,000; Full time

Job summary

Join a dynamic team at an innovative firm as a Sr. Physical Design Engineer, where you'll play a crucial role in designing cutting-edge hardware for cloud infrastructure. This position offers the opportunity to work on custom SoCs that power machine learning servers, collaborating with talented engineers to optimize physical design methodologies. You'll be part of a culture that values diversity and inclusion, ensuring that your contributions help shape the future of technology. If you're passionate about hardware design and eager to tackle complex challenges, this role is perfect for you.

Benefits

Inclusive Team Culture

Employee-led Affinity Groups

Annual Learning Experiences

Diverse Perspectives Initiatives

Qualifications

• 8+ years of experience in ASIC Physical Design from RTL-to-GDSII.
• Deep understanding of sign-off activities and physical verification.

Responsibilities

• Drive IO/Core block physical implementation and timing closure.
• Collaborate with RTL/logic designers for architectural feasibility.

Skills

ASIC Physical Design

RTL-to-GDSII

Scripting (Tcl, Perl, Python)

Device Physics Knowledge

Mentorship and Team Collaboration

Education

Bachelor's in Electrical Engineering or Computer Science

Master's in Electrical Engineering or Computer Science

Tools

Cadence

Mentor Graphics

Synopsys

Job description

Sr. Physical Design Engineer, Annapurna Labs

Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world. We have data center locations in the U.S., Europe, Singapore, and Japan, and customers across all industries.

Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, Trainium Systems (our custom designed machine learning inference and training datacenter servers). Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.

Key Job Responsibilities

1. Work with RTL/logic designers to drive architectural feasibility studies, explore power-performance-area tradeoffs for physical design closure.
2. Drive IO/Core block physical implementation through synthesis, floor planning, bus/pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, ECO and sign-off.
3. Develop physical design methodologies.
4. Evaluate 3rd party IP and provide recommendations.
5. Be a highly-valued member of our start-up like team through excellent collaboration and teamwork with other physical design engineers as well as with the RTL/Arch. teams.

About the Team

Inclusive Team Culture: Here at AWS, we embrace our differences. We are committed to furthering our culture of inclusion. We have ten employee-led affinity groups, reaching 40,000 employees in over 190 chapters globally. We have innovative benefit offerings and host annual and ongoing learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon (gender diversity) conferences. Amazon’s culture of inclusion is reinforced within our 16 Leadership Principles, which remind team members to seek diverse perspectives, learn and be curious, and earn trust.

Minimum Requirements

1. BS + 8yrs or MS + 6yrs in EE/CS.
2. 6+ years in ASIC Physical Design from RTL-to-GDSII in either 7nm, 14/16nm, 20nm, or 28nm.
3. Block Design using EDA tools (examples: Cadence, Mentor Graphics, Synopsys, or Others) including synthesis, equivalency verification, floor planning, bus/pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, and ECO.
4. Deep understanding of sign-off activities (timing, ir/em, physical verification).
5. Scripting experience with Tcl, Perl or Python.
6. Expertise using CAD tools (examples: Cadence, Mentor Graphics, Synopsys, or Others) to develop flows for synthesis, formal verification, floor planning, bus/pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, and ECO.
7. 4+ years in integrating IP and ability to specify and drive IP requirements in the physical domain.
8. Thorough knowledge of device physics, custom/semi-custom implementation techniques.
9. Experience solving physical design challenges across various technologies such as DDR, PCIe, fabrics, etc.
10. Experience in extraction of design parameters, QOR metrics, and analyzing trends.
11. Ability to provide mentorship and guidance to junior engineers and be a very effective team player.
12. Meets/exceeds Amazon’s leadership principles requirements for this role.
13. Meets/exceeds Amazon’s functional/technical depth and complexity for this role.

Amazon is committed to a diverse and inclusive workplace. Amazon is an equal opportunity employer and does not discriminate on the basis of race, national origin, gender, gender identity, sexual orientation, protected veteran status, disability, age, or other legally protected status.