Sr. Emulation Engineer

Mindfore Technologies; San Diego (CA); On-site; USD 150,000 - 210,000; Full time

Job summary

Mindfore Technologies is seeking a Sr. Emulation Engineer in San Jose to lead the setup and maintenance of Siemens Veloce emulation and prototyping platforms.

You will adapt SoC designs for Emulation and Prototyping, develop and debug system-level testbenches, and support pre-silicon validation, power/performance analyses, and early software bring-up. Strong RTL, UVM, and scripting skills are required.

Qualifications

• BS/MS/Ph.D. in EE, CS, or related field with 7+ years of SoC design experience.
• Experience with emulation platforms (Veloce, Palladium, or ZeBu) and FPGA-based prototyping systems (proFPGA, HAPS, or Protium).
• Experience with emulating high speed I/O interfaces such as PCIe and UCIe and memory technologies such as LPDDR and HBM.
• Solid understanding of digital design, RTL (Verilog/SystemVerilog), and SoC architecture.
• Proficiency in hardware debug tools, waveform viewers, and logic analyzers.
• Scripting skills (e.g., Python, Tcl, Perl) for automation and infrastructure development.
• Familiarity with UVM, simulation, and testbench environments.
• SystemVerilog and UVM-based verification experience is a plus
• Hand-on software development experience with C/C++ is a plus

Responsibilities

• Set up and maintain Siemens Veloce emulation and prototyping platforms
• Adapt SoC designs for Emulation and Prototyping
• Develop and debug emulation testbenches and system-level environments
• Support pre-silicon validation, power/performance analysis, and early software bring-up
• Participate in silicon bring-up and validation
• Collaborate with design and verification teams to isolate design issues and accelerate debug
• Optimize performance of the emulation workloads and reduce turnaround time
• Work with firmware/software teams to enable use of emulators for OS and driver testing

Skills

Veloce

Palladium

ZeBu

PCIe

UCIe

LPDDR

HBM

Education

BS/MS/Ph.D. in EE, CS, or related field

Tools

Veloce

Palladium

ZeBu

proFPGA

HAPS

Protium

Job description

Job Title: Sr. Emulation Engineer

Location: San Jose, CA - Onsite

Duration: 12+ Months

Exp Level Required: 10+ years

Key Skills:

• Veloce, Palladium, or ZeBu, PCIe and UCIe; and memory technologies such as LPDDR and HBM.

Responsibilities:

• Set up and maintain Siemens Veloce emulation and prototyping platforms
• Adapt SoC designs for Emulation and Prototyping
• Develop and debug emulation testbenches and system-level environments
• Support pre-silicon validation, power/performance analysis, and early software bring-up.
• Participate in silicon bring-up and validation.
• Collaborate with design and verification teams to isolate design issues and accelerate debug.
• Optimize performance of the emulation workloads and reduce turnaround time.
• Work with firmware/software teams to enable use of emulators for OS and driver testing.

5 to 10 years of experience in the following areas:

• BS/MS/Ph.D. in EE, CS, or related field with 7+ years of SoC design experience.
• Experience with emulation platforms (Veloce, Palladium, or ZeBu) and FPGA-based prototyping systems (proFPGA, HAPS, or Protium)
• Experience with emulating high speed I/O interfaces such as PCIe and UCIe and memory technologies such as LPDDR and HBM.
• Solid understanding of digital design, RTL (Verilog/SystemVerilog), and SoC architecture.
• Proficiency in hardware debug tools, waveform viewers, and logic analyzers.
• Scripting skills (e.g., Python, Tcl, Perl) for automation and infrastructure Development.
• Familiarity with UVM, simulation, and testbench environments.
• SystemVerilog and UVM-based verification experience is a plus
• Hand-on software development experience with C/C++ is a plus