Sr Design Verification Engineer

Ventana Micro Systems; Austin (TX); On-site; USD 130,000 - 222,000; Full time

Job summary

Ventana Micro Systems, a leading semiconductor startup, seeks a Sr Design Verification Engineer to drive the development of innovative RISC-V processors. This role involves creating verification plans, debugging designs, and constructing testbenches. Ideal candidates will have significant industry experience and strong technical skills in verification methodologies.

Qualifications

• 4+ years experience required for some roles, 8+ for others.
• Strong domain knowledge of computer architecture expected.
• Ability to work independently and across geographies.

Responsibilities

• Develop and execute verification plans for units and features.
• Construct testbenches, scoreboards, and stimulus generators.
• Implement functional coverage models.

Skills

SystemVerilog verification development experience

Testbench construction using UVM

Scoreboards and stimulus generators for complex units

Industry experience with CPU microarchitecture

Software development experience in C/C++ and Python

Education

Bachelor’s or Master’s degree in related engineering field

Job description

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Ventana Micro Systems is at the forefront of the two hottest trends that are revolutionizing the semiconductor industry: RISC-V and Chiplet Architecture. Check out our CEO talking with global tech analyst Patrick Moorhead about how Ventana combines the extensibility of RISC-V with chiplet technology to create customer-driven innovation for best-in-class solutions for the data center.

The company is well-funded and backed by some of the largest strategic investors in the industry with the goal of building best-in-class CPU cores for cloud, enterprise, 5G, and Edge computing. We invite you to join the revolution and contribute to one of the hottest Semiconductor startups in the industry.

We are looking to fill multiple Design Verification openings to continue the development of its innovative RISC-V processors and subsystems.

Role:

• Develop and execute verification plans for units and features.
• Construct testbenches, scoreboards, and stimulus generators.
• Implement functional coverage models.
• Debug designs in simulation, prototyping platforms, and silicon.
  
  

Qualifications Required:

• Roles requiring both 4+ and 8+ years industry experience
• Bachelor’s or Master’s degree in related engineering field
• Ability to work independently and across geographies
• Strong domain knowledge of computer architecture
  
  

Skills and Qualifications Desired:

• SystemVerilog verification development experience
• Testbench construction using UVM or analogous methodologies
• Scoreboards and stimulus generators for complex units
• Industry experience with CPU microarchitecture (e.g. x86, ARM, SPARC, MIPS, RISC-V, POWER) and/or coherent caching systems
• Software development experience in compiled (C/C++) and interpreted (Python) languages
• Unit or feature ownership throughout the project lifecycle
• Post-silicon validation
  
  

EEOE

Ventana is an Equal Employment Opportunity Employer. We value diversity and uphold an inclusive environment where all people feel that they are equally respected and valued. Qualified applicants will receive consideration without regard to race, color, creed, religion, sex, sexual orientation, national origin or nationality, ancestry, age, disability, gender identity or expression, marital status, veteran status, or any other category protected by law.

COVID-19

Ventana encourages all employees to be fully vaccinated (and boosted, if eligible) against COVID-19. We do require Proof of vaccination (or proof of a negative PCR test) to work in the office or meet with customers/ business partners.

NOTICE: External Recruiters/ Staffing Agencies:

Ventana Micro instructs agencies not to engage with its employees to present candidates. Employees are not authorized to enter into any agreement regarding the placement of candidates. All unsolicited resumes received as gratuitous submissions. We reserve the right to directly contact any candidate speculatively submitted by a third party. Such contact will not constitute acceptance of any contractual arrangement between Ventana and the agency, and Ventana will not be liable for any fees should it choose to engage the candidate’s services. All external recruiters and staffing agencies are required to have a valid contract executed by Ventana’s CFO.

Please Note: Fraudulent job postings/job scams are increasingly common. Our open positions can be found through the careers page on our website.

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Job function

  Engineering and Information Technology

• Industries

  Semiconductor Manufacturing

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