Senior Design Verification Engineer

IC Resources; Austin (TX); On-site; USD 104,000 - 291,000; Full time

Job summary

A well-funded semiconductor company is seeking a Senior Verification Engineer to support the development of next-generation digital communication technologies. This role involves leading verification processes for high-performance ASICs, collaborating with cross-functional teams, and ensuring completeness of verification metrics.

Qualifications

• Proven experience in 4+ successful tapeouts.
• Solid understanding of verification methodologies such as UVM.
• Familiarity with high-speed protocols like Ethernet preferred.

Responsibilities

• Leading block-level and system-level verification from planning through coverage closure.
• Developing reusable verification components using SystemVerilog and UVM.
• Writing targeted, self-checking testbenches to validate performance and functionality.

Skills

Verification methodologies

SystemVerilog

UVM

High-speed protocols

Job description

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Principal Recruitment Consultant at IC Resources - Semiconductor Engineering division

A well-funded semiconductor company is seeking a Senior Verification Engineer to support the development of next-generation digital communication technologies.

This is an exciting opportunity to work on advanced, high-performance ASICs targeting data infrastructure, AI systems, and high-speed networking.

Responsibilities include:

1. Leading block-level and system-level verification from planning through coverage closure.
2. Developing reusable verification components using SystemVerilog and UVM.
3. Writing targeted, self-checking testbenches to validate performance, functionality, and edge cases.
4. Collaborating cross-functionally with RTL designers to debug and resolve design issues early in the development cycle.
5. Analyzing and tracking functional and code coverage metrics to ensure verification completeness.

Requirements:

1. Proven experience in 4+ successful tapeouts.
2. A history of successfully completing multiple verification cycles, from planning through to silicon.
3. Solid understanding of verification methodologies such as UVM.
4. Familiarity with high-speed protocols like Ethernet or other data-heavy interfaces is preferred.

Contact: Tel - 01189073075

LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/

Seniority level

• Mid-Senior level

Employment type

• Full-time

Job function

• Staffing and Recruiting

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