Sr. ASIC Design Engineer

AMC OU Ambarella Corp; United States; On-site; USD 135,000 - 170,000; Full time

Benefits offered by this job

New-hire RSU grants

Annual RSU grants

Highly competitive benefits

Job summary

AMC OU Ambarella Corp in the United States is seeking an AI Vision Processor to design and implement cutting-edge video processing systems. The ideal candidate will have a Master's degree in Electrical/Electronics/Computer Engineering and experience with System Verilog, Verilog, and other programming languages.

This role offers a salary between $135,000 and $170,000 depending on experience and location, along with competitive benefits including RSU grants.

Qualifications

• 0–5 years of experience in related fields.
• Strong communication skills and teamwork abilities.
• Adept problem-solving skills.

Responsibilities

• Design and implement video compression and image processing systems.
• Synthesize and optimize RTL for timing and power.
• Develop unit-level test environments.

Skills

System Verilog

Verilog

Python

Perl

Logic design

VLSI design

Education

Master’s degree in Electrical/Electronics/Computer Engineering

Job description

AI Vision Processors For Edge Applications

Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.

Position Responsibilities

• Designing and implementing video compression, image processing, vector computation, and flexible compute systems optimized for future AI agents and large language model (LLM) inference—alongside processor cores and memory subsystems using System Verilog, focusing on next-generation edge AI markets such as automation, robotics, and intelligent low power embedded systems.
• Logic design, implementation, and verification using Verilog, System Verilog, and any required programming and scripting languages.
• Synthesizing and optimizing RTL for timing, area, and power.
• Exploring micro-architecture and architectural tradeoffs via quick modelling using scripting languages such as Python, Perl, etc.
• Developing unit-level test environments and test cases.
• Developing front-end methodologies and tool flows.
• Participating in chip bring-up and testing.
• Analyzing and reviewing code coverage and functional coverage, and providing recommendations to the verification team to address any gaps.

Requirements

• Master’s degree in Electrical/Electronics/Computer Engineering with 0–5 years of experience.
• Good understanding of computer architecture, logic design, and VLSI design.
• Knowledge of System Verilog, Verilog, Python, and Perl.
• Knowledge of design verification and functional coverage.
• Ability to program in scripting languages and write assembly language programs.
• Strong communication skills and a good team player.
• Adept problem‑solving abilities.
• Knowledge of logic synthesis and timing closure is a plus.

Salary: $135,000 - $170,000 (base), determined by location, experience, and comparable positions.

Benefits: New‑hire RSU grants, annual RSU grants, and other highly competitive benefits.

Our target applications include autonomous vehicles, intelligent video surveillance, self‑flying drones, smart wearable cameras, 360‑degree immersive video, and more.