Staff ASIC Design Engineer

Ambarella, Inc.

United States

On-site

USD 195,000 - 226,000

Full time

14 days+
Application generator

Don’t send a generic resume — generate a resume and cover letter tailored to this exact role.

Get past ATS filters

Benefits offered by this job

New-hire RSU grants
Opportunity for annual RSU grants
Highly competitive benefits

Job summary

Ambarella, Inc. is seeking an experienced Staff ASIC Design Engineer at their US Headquarters. This role focuses on designing advanced systems for edge AI applications with responsibilities spanning video compression, image processing, and flexible compute systems.

Candidates should have a Master’s degree in Electrical Engineering and 5-10 years of relevant experience, along with knowledge of VLSI design principles and strong programming skills. This position offers a base salary range of $195,000 to $226,000 and includes potential equity grants and competitive benefits.

Qualifications

  • Master’s degree in electrical/Electronics/Computer Engineering with 5-10 years of experience.
  • Good understanding of computer architecture, logic design and VLSI design.
  • Knowledge of System Verilog, Verilog, python, and Perl.
  • Strong communication skills and a good team player.

Responsibilities

  • Designing and implementing video compression, image processing, vector computation, and flexible compute systems.
  • Synthesize and optimize RTL for timing, area, and power.
  • Develop front-end methodologies and tool flows.
  • Participate in chip bring-up and testing.

Job description

## Staff ASIC Design EngineerApplylocations: US Headquarterstime type: Full timeposted on: Posted 7 Days Agojob requisition id: JR100323## AI Vision Processors For Edge Applications### *Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.***Job Description**Ambarella is a leading fabless semiconductor company at the forefront of edge AI-based computer vision. Our SoCs (System-on-Chips) power everything from autonomous driving and ADAS to intelligent video security and robotics. We are building the next generation of Edge AI, operating at the intersection of high-performance hardware and real-world software deployment.**Why this is an ideal opportunity for an experienced VLSI designer:**This role offers the opportunity to work on highly differentiated SoC designs where your contributions are visible, meaningful, and directly connected to the chip being built. Unlike roles that focus on a narrow block or isolated function, this position provides broad exposure across video compression, image processing, vector computation, processor cores, memory subsystems, and flexible compute architectures for next-generation edge AI applications. Experienced VLSI designers will have the chance to influence micro-architecture, optimize RTL for performance, power, and area, participate in chip bring-up, and see their work move from concept through silicon. It is a unique opportunity to apply deep design expertise while gaining wide technical scope, strong product context, and clear ownership of impactful work in real-world AI and computer vision systems.**Position Responsibilities:*** Designing and implementing video compression, image processing, vector computation, and flexible compute systems optimized for future AI agents and large language model (LLM) inference—alongside processor cores and memory subsystems using System Verilog, with a focus on enabling next-generation edge AI markets such as automation, robotics, and intelligent low power embedded systems.* Logic design, implementation, and verification using Verilog, System Verilog, and any required programing and scripting languages.* Synthesize and optimize RTL for timing, area, and power.* Explore micro-architecture and architectural tradeoffs via quick modelling using scripting languages such as python, Perl etc.* Developing front-end methodologies and tool flows.* Participating in chip bring-up and testing.* Analyzing and reviewing code coverage and functional coverage and providing recommendations to the verification team to address any gaps.**Requirements:*** Master’s degree in electrical/Electronics/Computer Engineering with 5-10 years of experience.* Good understanding of computer architecture, logic design and VLSI design.* Knowledge of System Verilog, Verilog, python, and Perl.* Knowledge of design verification, and functional coverage.* Ability to program in scripting languages and the ability to write assembly language programs.* Strong communication skills and a good team player.* Adept problem-solving abilities* Knowledge of logic synthesis and timing closer is a plusThe base salary range is $195,000-$226,000. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. We also offer new-hire RSU grants and the opportunity for annual RSU grants, as well as other highly competitive benefits.### About UsCombining technical expertise and a commitment to quality, Ambarella has established itself as the industry standard for excellence in video performance by offering pristine imagery, efficient compression, and low-power operation. For our next phase of growth, we are looking for talented team members to help us deliver our advanced computer vision algorithms to tomorrow’s intelligent video products. Our target applications include autonomous vehicles, intelligent video surveillance, self-flying drones, smart wearable cameras, 360-degree immersive video, and more.
Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Staff ASIC Design Engineer
Staff ASIC Design Engineer

AMC OU Ambarella Corp • United States

On-site
USD 195,000 - 226,000
Competitive benefits
Annual RSU grants
New-hire RSU grants
Sr. Product Marketing Manager
Sr. Product Marketing Manager

Ambarella • Santa Clara (CA)

On-site
USD 190,000 - 220,000
RSU grants
Competitive benefits
Sr. ASIC Design Engineer
Sr. ASIC Design Engineer

AMC OU Ambarella Corp • United States

On-site
USD 135,000 - 170,000
New-hire RSU grants
Annual RSU grants
Highly competitive benefits
Staff System Software Engineer - Embedded AI & Algorithm
Staff System Software Engineer - Embedded AI & Algorithm

AMC OU Ambarella Corp • United States

On-site
USD 160,000 - 183,000
RSU grants
Competitive benefits
Physical Design Engineer
Physical Design Engineer

AMC OU Ambarella Corp • United States

On-site
USD 140,000 - 156,000
New-hire RSU grants
Annual RSU grants
Highly competitive benefits
ASIC Design Engineer Intern
ASIC Design Engineer Intern

Ambarella • Washington

On-site
USD 120,000 - 150,000
Sr. Product Marketing Manager
Sr. Product Marketing Manager

AMC OU Ambarella Corp • United States

On-site
USD 190,000 - 220,000
New-hire RSU grants
RSU grants
Sr. Product Marketing Manager
Sr. Product Marketing Manager

Ambarella • Headquarters (WA)

On-site
USD 190,000 - 220,000
RSU grants
Annual RSU grants
Competitive benefits
Software Engineer Intern
Software Engineer Intern

Ambarella • Washington

On-site
Firmware & Vision DSP Intern for Edge AI
Firmware & Vision DSP Intern for Edge AI

Ambarella • Washington

On-site