Sr Account Technical Executive II

Cadence Design Systems, Inc.

San Jose (CA)

On-site

USD 248,000 - 372,000

Full time

14 days+

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Job summary

Cadence Design Systems, Inc. is seeking an Account Technical Executive to lead technical engagements in Digital IC, Custom IC, and Analog/RF design flows using Innovus and Virtuoso.

You will partner with design teams to optimize layout productivity and time-to-market, while driving AI-driven design methodologies and automation to improve PPA and efficiency. You will translate customer pain points into actionable R&D requirements, provide leadership in flow development, and help expand Cadence

Qualifications

  • BSEE required, MSEE preferred.
  • 5–10+ years in Digital IC, Custom IC, Analog, or RF.
  • Experience with Innovus and Virtuoso.
  • Travel ~25% within North America.

Responsibilities

  • Lead technical engagements for digital IC/Custom IC/Analog/RF design flows, with a primary focus on Innovus and Virtuoso platforms along with signoff technologies
  • Partner with customer design and CAD teams to optimize layout productivity, quality, and time-to-market
  • Drive adoption of advanced capabilities such as: constraint-driven and automation-assisted layout; device-level and full-chip layout methodologies; advanced node layout challenges (FinFET, GAA)
  • Champion the integration of AI-driven design techniques, including agentic AI workflows to automate design exploration, layout optimization, and verification tasks
  • Translate customer pain points into actionable requirements for R&D and product engineering
  • Provide technical leadership in methodology definition, flow development, and best practices
  • Influence competitive replacements and expand footprint of Cadence Custom IC solutions

Skills

Digital IC
Custom IC
Analog design
RF design
Layout automation
AI in EDA
Agentic AI
PPA tradeoffs
Customer engagement
Leadership

Education

BSEE
MSEE preferred

Tools

Genus/Innovus
Virtuoso Platform
Spectre
SKILL scripting

Job description

HOME CA

SAN JOSE

Full time

R55800

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

As an Account Technical Executive (ATX) focused on Digital/Custom IC / Analog / RF design, you will serve as the primary technical leader driving adoption and value realization of the Cadence Innovus Platform , Digital IC flows , Cadence Virtuoso Platform, including Virtuoso Layout Suite and associated Custom IC design flows.You will partner closely with strategic sales teams and key customer stakeholders (design leads, CAD teams, and methodology owners) to solve complex digital and custom IC design challenges, with a strong emphasis on layout implementation, analog and mixed-signal productivity, and advanced-node methodologies.

This role also plays a key part in driving next-generation design methodologies by leveraging AI-driven and agent-based workflows, helping customers adopt intelligent automation frameworks that enhance productivity, design quality, and time-to-market.

Key Responsibilities
  • Lead technical engagement for Digital IC/Custom IC / Analog / RF design flows, with a primary focus on Innovus and Virtuoso platforms along with signoff technologies

  • Partner with customer design and CAD teams to optimize layout productivity, quality, and time-to-market

  • Drive adoption of advanced capabilities such as:

  • Constraint-driven and automation-assisted layout

  • Device-level and full-chip layout methodologies

  • Advanced node layout challenges (FinFET, GAA)

  • EM and IR-aware layout and parasitic extraction flows

  • Champion the integration of AI-driven design techniques, including:

  • Agentic AI workflows to automate design exploration, layout optimization, and verification tasks

  • AI-assisted decision-making for layout trade-offs including PPA, matching, and parasitics

  • Translate customer pain points into actionable requirements for R&D and product engineering

  • Provide technical leadership in methodology definition, flow development, and best practices

  • Influence competitive replacements and expand footprint of Cadence Custom IC solutions

  • Support executive-level discussions by linking technical value such as PPA, productivity, and risk reduction to business outcomes

Key Qualifications

Digital IC

  • Deep hands-on experience with digital design flow including Genus/Innovus , Quantus , Tempus and Pegasus

  • Clear understanding of PPA tradeoff’s and other key concerns for design teams

  • Ability to think full stack/flow – interconnect technologies and drive value proposition

  • Experience working with design teams on large SOC tapeouts

  • Understanding of foundry working model and care bouts – knowledge of PDK enablement , DTCO and technology entitlement a plus

Custom IC and Virtuoso Expertise
  • Deep hands-on experience with the Cadence Virtuoso Platform, including:

  • Virtuoso Layout Suite (XL, GXL, EXL)

  • Schematic-driven layout and LVS flows

  • DRC and physical verification integration

  • Strong knowledge of custom analog and mixed-signal layout techniques, including:

  • Device matching, symmetry, common centroid, and shielding

  • Parasitic-aware layout for high-performance analog and RF circuits

  • Experience with the Spectre simulation environment and layout-to-schematic integration

  • Familiarity with PCell development, layout automation, and scripting (SKILL preferred)

Agentic AI and Intelligent Design Automation
  • Strong understanding of AI and machine learning applications in semiconductor design, specifically:

  • Agentic AI frameworks such as multi-agent systems, goal-driven automation, and autonomous optimization

  • AI-assisted layout generation and design space exploration

  • Intelligent automation of repetitive design and verification tasks

  • Experience or demonstrated interest in:

  • Applying AI to EDA workflows, CAD flows, or design methodology optimization

  • Working with data-driven or reinforcement learning-based optimization approaches

  • Ability to bridge AI innovation with practical design flows, translating emerging technologies into deployable customer solutions

Design and Methodology Expertise
  • 5-10 or more years of experience in:

  • Custom IC, Analog, or RF design or layout engineering

  • Mixed-signal design flows at block and full-chip level

  • Deep understanding of:

  • Analog and RF design flows from schematic to signoff

  • Physical verification, extraction, and post-layout simulation

  • Advanced-node layout challenges and reliability considerations

  • Experience with layout productivity optimization and methodology deployment at scale

Customer Engagement and Leadership
  • Proven ability to:

  • Engage deeply with CAD teams, design leads, and senior technical leadership

  • Identify and articulate technical gaps and business impact

  • Drive alignment between customer roadmap and Cadence product direction

  • Strong communication skills with the ability to translate between deep technical detail and executive-level value

Position Requirements
  • BSEE required, MSEE or higher strongly preferred

  • 5-10 or more years of experience in Digital IC , Custom IC, Analog, or RF design or layout

  • Demonstrated expertise in Innovus-based and Virtuoso-based design environments

  • Exposure to or strong interest in AI-driven design methodologies and agent-based automation frameworks

  • Exposure to chiplet design flows , packaging and IP design a plus

  • Strong collaboration and customer-facing experience

  • Ability to travel approximately 25 percent, primarily within North America

The annual salary range for California is $248,000 to $372,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Equal Employment Opportunity Policy:
  • Read the policy(opens in a new tab) (https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/company/careers/equal-employment-opportunity-policy.pdf)
Privacy Policy:

Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) (https://www.cadence.com/en_US/home/privacy/privacy-policy.html) .

E-Verify Cadence participates in the

E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) (https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/company/careers/e-verify-participation-poster.pdf)

Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.

Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies for Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

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