FPGA Verification Engineer II

CesiumAstro, Inc.

Denver (CO)

On-site

USD 113,000 - 136,000

Full time

14 days+
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Benefits offered by this job

Stock options
Health insurance
Dental insurance
Vision insurance
HSA
FSA
Life insurance
Disability
Retirement plans

Job summary

CesiumAstro, Inc. is seeking an FPGA Verification Engineer II in Denver to advance satellite FPGA verification and testbench development. You will collaborate across teams to implement scalable verification approaches and stay ahead of industry best practices.

The role emphasizes hands-on verification, mentoring, and contributing to CI/regression workflows in a dynamic space-technology environment.

Qualifications

  • BS or MS in Computer Science, Electrical Engineering, or Computer Engineering.
  • 2+ years in verification and automation.
  • Knowledge of FPGA verification techniques: VHDL, Verilog, SystemVerilog, C/C++, SystemC, UVM/UVMf, DPI-C, TLM, Formal CDC, QEMU and VIP.
  • Understanding of CI, regression testing and HIL testing.
  • Proficiency with Linux and Xilinx toolchains.

Responsibilities

  • Evaluate and implement FPGA and digital design verification, simulation, and emulation infrastructure.
  • Develop CI and regression testing infrastructure and maintain testbenches.
  • Create reusable VIP modules and advanced testbenches using UVMf.
  • Mentor engineers on UVMf usage and modern FPGA design approaches.
  • Collaborate with leadership to improve processes without disruption.

Skills

FPGA verification
Verification tooling
CI / regression testing
Linux
Xilinx tools
VHDL / Verilog / SystemVerilog
UVM / UVMf
DPI-C / VIP
QEMU

Education

BS or MS in CS/EE/CE

Tools

Xilinx tools
VIP
QEMU

Job description

Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State.

At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to learn, develop, and engage across our organization. If you are looking for hands-on, interactive, and autonomous work, CesiumAstro is the place for you. We are actively seeking passionate, collaborative, energetic, and forward-thinking individuals to join our team.

We are looking to add an FPGA Verification Engineer II to our team. If you enjoy working in a startup environment and are passionate about developing leading-edge phased arrays for satellites, spacecraft, and aerospace systems, we would like to hear from you.

Job Duties And Responsibilities
  • Contribute to the evaluation and technical implementation of FPGA and digital design simulation, verification and emulation infrastructure.
  • Contribute to the development, maintenance and phased deployment of continuous integration and regression testing infrastructure.
  • Develop state-of-the-art UVMf-based top-level and module-level testbenches using block-to-top best practices for reusability, including both control and data plane stimulation using VIP & System Verilog DPI-C integration with existing MATLAB and Python numerical models.
  • Lead the development of reusable custom VIP modules.
  • Work closely with the engineering and senior leadership teams to train and mentor engineers at all experience levels on UVMf testbench usage and modern approaches to FPGA/digital design. Work with the modeling and scientific staff to implement DPI-C dataplane verification interfaces into existing MATLAB and Python models.
  • Aid the Lead Verification Engineer in evaluating current processes regarding FPGA and digital design with a focus on Xilinx TLM models and QEMU-RP integration.
  • Work closely with vendors to define requirements of future simulation model deliverables.
  • Maintain up-to-date knowledge of industry best-practices regarding FPGA and digital design methodologies.
  • Work closely with the engineering leadership team to evaluate and non-disruptively implement process improvements.
Job Requirements And Minimum Qualifications
  • A Bachelor of Science (BS) or Master of Science (MS) degree in Computer Science, Electrical Engineering, or Computer Engineering.
  • Minimum of 2 years of industry experience in verification and automation.
  • Knowledge of FPGA digital design verification techniques including VHDL, Verilog, SystemVerilog, C/C++, SystemC, UVM/UVMf, DPI-C, TLM, Formal CDC and functional analysis, QEMU and VIP.
  • Understanding of digital design automation infrastructure, including CI, regression testing and HIL testing.
  • Competency with Linux.
  • Knowledge of vendor-provided FPGA development tools with a focus on Xilinx tools.

$113,000 - $136,000 a year

CesiumAstro considers several factors when extending an offer, including but not limited to, the role and associated responsibilities, a candidate’s work experience, education/training, and key skills. Full-time employment offers include company stock options and a generous benefits package including health, dental, vision, HSA, FSA, life, disability and retirement plans.

CesiumAstro is an Equal Opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, protected Veteran Status, or any other characteristic protected by applicable federal, state, or local law.

We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.

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