Space-Grade FPGA Engineer II

Roman Health Pharmacy LLC; Melbourne (FL); On-site; USD 90,000 - 130,000; Full time

Benefits offered by this job

Stock options

Benefits package

Job summary

CesiumAstro, a developer of space-grade communication systems for satellites and aerospace platforms, seeks an FPGA Engineer II to join our team. You will contribute to FPGA circuits and systems through all development phases, with emphasis on HDL design, verification, testing, and deployment of high-speed interfaces and multi-clock domains.

The ideal candidate has a BS or MS in Electrical or Computer Engineering, at least 2 years of HDL FPGA experience, and hands-on lab skills (DSOs, spectrum

Qualifications

• BS or MS in Electrical/Computer Engineering from an accredited university.
• Minimum 2 years in HDL FPGA design/analysis.
• Experience with FPGA design and verification (Verilog/VHDL).
• Hands-on experience with lab instruments (DSO, spectrum analyzers, RF signal generators).
• Excellent written and verbal communication skills.

Responsibilities

• Develop FPGA circuits and systems through all development phases.
• Design, verify, test, and deploy HDL designs with multiple clocks.
• Perform testing, validation, and verification; DSP/board-level experience desirable.
• Collaborate with cross-functional engineering teams.

Skills

FPGA design

Verilog/VHDL

HDL tooling (Vivado/ModelSim)

Lab instrumentation

Communication skills

Education

BS in Electrical Engineering or Computer Engineering

MS in Electrical Engineering or Computer Engineering

Tools

Vivado

ModelSim

HDL Coder

Xilinx tools

Job description

CesiumAstro, a developer of space-grade communication systems for satellites and aerospace platforms, seeks an FPGA Engineer II to join our team. You will contribute to FPGA circuits and systems through all development phases, with emphasis on HDL design, verification, testing, and deployment of high-speed interfaces and multi-clock domains.

The ideal candidate has a BS or MS in Electrical or Computer Engineering, at least 2 years of HDL FPGA experience, and hands-on lab skills (DSOs, spectrum