Senior FPGA Engineer, Space Hardware & Verification

CesiumAstro; Melbourne (FL); On-site; USD 120,000 - 150,000; Full time

Benefits offered by this job

Stock options

Health, dental, vision

Retirement plan

Job summary

CesiumAstro in Melbourne, FL is seeking a Senior FPGA Engineer I to design, verify, test, and deploy FPGA systems for satellites and aerospace platforms. You will handle HDL-level development,高-speed interfaces, multiple clock domains, and DSP-related components, with design reviews for customers and executives.

Ideal candidates hold a BS or MS in Electrical or Computer Engineering, 4+ years FPGA experience, and proficiency with Verilog/VHDL, Vivado, and lab instrumentation.

Qualifications

• 4 years of industry or university research experience in the design, analysis, and implementation of FPGA systems at the HDL level.
• Expertise in FPGA design and verification (Verilog/VHDL, HDL coder, Xilinx’s Vivado, Modelsim, etc.).
• Hands-on experience with lab instruments such as digital oscilloscopes, spectrum analyzers, RF signal generators, and vector signal analyzers.
• Excellent written and verbal communication skills.

Responsibilities

• In this position, you will be responsible for FPGA circuits and systems through all phases of the development process.
• The ideal candidate will have experience in FPGA design, verification, test, and deployment at the HDL level.
• Testing, validation, and verification will be central tasks for any FPGA design.

Skills

FPGA design & verification

Lab instruments experience

HDL languages: Verilog/VHDL

Communication skills

Education

BS or MS in Electrical Engineering or Computer Engineering

Tools

Vivado

Modelsim

HDL coder

Job description

CesiumAstro in Melbourne, FL is seeking a Senior FPGA Engineer I to design, verify, test, and deploy FPGA systems for satellites and aerospace platforms. You will handle HDL-level development,高-speed interfaces, multiple clock domains, and DSP-related components, with design reviews for customers and executives.

Ideal candidates hold a BS or MS in Electrical or Computer Engineering, 4+ years FPGA experience, and proficiency with Verilog/VHDL, Vivado, and lab instrumentation.