FPGA Verification Engineer II — Space Systems

Roman Health Pharmacy LLC; El Segundo (CA); On-site; USD 118,000 - 142,000; Full time

Benefits offered by this job

Stock options

Health insurance

Dental insurance

Vision insurance

HSA

FSA

Life insurance

Disability insurance

Retirement plan

Job summary

CesiumAstro is hiring an FPGA Verification Engineer II to advance verification and automation for space-grade FPGA designs. You will build state-of-the-art testbenches using UVMf, integrate DPI-C with MATLAB and Python models, and collaborate with engineering leadership to drive reusable VIP modules.

You will mentor engineers across experience levels and help evolve FPGA/digital design processes, including CI, regression testing, and vendor collaboration for future simulation models.

Qualifications

• BS or MS in Computer Science, Electrical Engineering, or Computer Engineering.
• Minimum 2 years of industry experience in verification and automation.
• Knowledge of FPGA digital design verification techniques including VHDL, Verilog, SystemVerilog, C/C++, SystemC, UVM/UVMf, DPI-C, TLM, Formal CDC and functional analysis, QEMU and VIP.

Responsibilities

• Contribute to evaluation and implementation of FPGA and digital design simulation, verification and emulation infrastructure.
• Develop CI and regression testing infrastructure.
• Develop UVMf-based testbenches and DPI-C integration with MATLAB/Python models.
• Lead development of reusable VIP modules.
• Mentor engineers on UVMf testbench usage and modern FPGA/digital design approaches.
• Evaluate FPGA/digital design processes with Xilinx TLM models and QEMU-RP integration.
• Collaborate with vendors to define requirements for future simulation models.
• Stay updated on industry best practices in FPGA and digital design.

Skills

VHDL

Verilog

SystemVerilog

C/C++

SystemC

UVM/UVMf

DPI-C

TLM

Formal CDC

QEMU

VIP

Education

BS or MS in Computer Science, Electrical Engineering, or Computer Engineering

Tools

Xilinx tools

Job description

CesiumAstro is hiring an FPGA Verification Engineer II to advance verification and automation for space-grade FPGA designs. You will build state-of-the-art testbenches using UVMf, integrate DPI-C with MATLAB and Python models, and collaborate with engineering leadership to drive reusable VIP modules.

You will mentor engineers across experience levels and help evolve FPGA/digital design processes, including CI, regression testing, and vendor collaboration for future simulation models.