SOC Test Engineer II: Characterization & Debug

NXP Semiconductors; Austin (TX); On-site; USD 90,000 - 130,000; Full time

Job summary

NXP Semiconductors in Austin, TX, seeks a Test Engineer II for SOC Microprocessors to design, develop, and implement cost-effective testing methods for IP on advanced nodes, collaborating with Design and Verification before tapeout. You will support qualification, characterization, and production test with diagnostic programs.

The role emphasizes New Product Introduction via characterization, qualification, and debug of new products, requiring knowledge of Verilog testbenches, ATE hardware, and

Qualifications

• Bachelor's degree or above in Electrical Engineering.
• 2-5 years of semiconductor test development experience.
• Hands-on with Advantest, Teradyne ATE, or System Level Test on FinFET or GAA SOCs <28nm.
• Experience with AI processors, SERDES interfaces (PCIe, USB, MIPI), HVST, MBIST, or analog test.
• Programming skills in Verilog and Python.
• Proven teamwork and communication skills.
• Knowledge of statistics and Six Sigma manufacturing.

Responsibilities

• Design, develop, and implement cost-effective testing methods for IP on advanced nodes.
• Support qualification, characterization, and production testing with diagnostic programs.
• Collaborate with Design and Verification teams before tapeout.
• Understand ATE hardware design and high-speed testing, and anticipate test strategy needs.

Skills

Verilog

Python

Teamwork

Communication

Problem solving

Six Sigma

Education

Bachelor's degree in Electrical Engineering

Tools

Advantest

Teradyne ATE

System Level Test

Job description

NXP Semiconductors in Austin, TX, seeks a Test Engineer II for SOC Microprocessors to design, develop, and implement cost-effective testing methods for IP on advanced nodes, collaborating with Design and Verification before tapeout. You will support qualification, characterization, and production test with diagnostic programs.

The role emphasizes New Product Introduction via characterization, qualification, and debug of new products, requiring knowledge of Verilog testbenches, ATE hardware, and