SoC Power & Performance Platform Architect

Apple, Inc.; Santa Clara (CA); On-site; USD 185,000 - 325,000; Full time

Job summary

Apple, Inc. in Santa Clara, California seeks a Power & Performance Hardware Engineer for Platform Architecture to analyze SoC power and performance and drive development of a unified system-on-a-chip architecture across Apple devices.

You will use workloads and benchmarks to measure power and performance across CPU, GPU, and subsystems, identify bottlenecks, and propose hardware and software improvements to guide future products.

Qualifications

• Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related quantitative field (or equivalent practical experience).
• Experience using benchmark software tools to accurately measure system performance.
• Experience with Python and shell scripting.
• Experience with modern consumer electronics devices, SoCs and multiple operating systems.

Responsibilities

• Collect and analyze power and performance data across a broad range of devices and workloads.
• Understand new and emerging software workloads, develop procedures and automation for measuring power and performance.
• Set up and configure new devices and software to enable accurate and repeatable benchmarking.
• Disassembling/reassembling of consumer devices while preserving functionality and thermal properties.
• Debugging and troubleshooting of desktop and mobile devices.

Skills

Benchmarking tools usage

Python

Shell scripting

SoCs & OS knowledge

Education

Bachelor's degree in Computer Science/Computer Engineering/Electrical Engineering or related field

Tools

Benchmark software tools

Job description

Apple, Inc. in Santa Clara, California seeks a Power & Performance Hardware Engineer for Platform Architecture to analyze SoC power and performance and drive development of a unified system-on-a-chip architecture across Apple devices.

You will use workloads and benchmarks to measure power and performance across CPU, GPU, and subsystems, identify bottlenecks, and propose hardware and software improvements to guide future products.