CPU Performance & Workload Architect — Platform/SoC

Apple, Inc.; Santa Clara (CA); On-site; USD 216,000 - 325,000; Full time

Job summary

Apple seeks an experienced CPU Performance & Workload Analysis Architect in Santa Clara, CA. The role sits at the intersection of hardware and software, driving CPU architecture insights, performance profiling, and software optimization across Apple devices.

You will collaborate with CPU, system, and software teams, exploring workloads and ML/AR/VR domains to guide future CPUs and roadmaps. A strong background in architecture, profiling tools, and cross-functional communication is essential.

Qualifications

• Experience with CPU architecture and micro-architecture.
• Object-oriented programming experience with C and C++.
• Experience with CPU performance analysis and associated tools.
• Experience with common performance benchmarks.

Responsibilities

• Profile and analyze existing and emerging workloads, bring up in CPU/SOC simulation environment.
• Develop and maintain performance and trace analysis tools.
• Develop and implement visual extensions to assist with data analysis used internally and by software partners.
• Run and analyze workloads on simulators and prototype devices and build performance analysis infrastructure.
• Develop domain expertise in emerging fields (e.g., ML, AR/VR) to identify hardware advancement opportunities and help software teams optimize for Apple devices.
• Profile and analyze workload in potential new product areas to guide CPU roadmap decisions.

Skills

CPU architecture

C/C++

Performance analysis

Benchmarks

Education

MS/PhD in Electrical or Computer Engineering

Job description

Apple seeks an experienced CPU Performance & Workload Analysis Architect in Santa Clara, CA. The role sits at the intersection of hardware and software, driving CPU architecture insights, performance profiling, and software optimization across Apple devices.

You will collaborate with CPU, system, and software teams, exploring workloads and ML/AR/VR domains to guide future CPUs and roadmaps. A strong background in architecture, profiling tools, and cross-functional communication is essential.