SoC Power Flow Methodology Engineer

Apple, Inc.; Austin (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

Apple Inc. in Austin, TX, is seeking a Power Flow Methodology Engineer to drive automated low-power design flows for next-generation chips. You will help architect, implement, and verify power analysis, optimization, and verification flows within the Silicon Engineering Power team.

You will collaborate with design teams to resolve issues, develop tools, and apply Tcl/Perl knowledge along with Python/C++/Java scripting to create robust solutions for RTL, synthesis, and P&R stages.

Qualifications

• BS and a minimum of 3 years of relevant industry experience.

Responsibilities

• Develop and enhance low-power flows and tools for power analysis, optimization and verification.
• Architect, implement and verify new low-power design flows across RTL, synthesis or P&R.
• Communicate with design teams to drive issues to resolution.

Skills

VLSI design

Scripting

Python

C++

Java

Software testing

Communication skills

Tcl

Perl

EDA tools

GUI development

UPF

Low-power design

Education

Bachelor's degree

Job description

Do you love creating solutions for complex challenges? As part of the Low Power group within Silicon Technologies, you’ll help deliver cutting-edge new technology and capabilities for low-power chip design that fuels Apple’s next-generation chips!In this role, as a member of our dynamic group, you will be responsible for the development and enhancement of our low-power flows, providing designers new capabilities in terms of power domains unseen in previous chips, while working on highly visible products used by millions of people every day!

Description

As a Power Flow Methodology Engineer, you’ll deliver new automated solutions and capabilities for the Silicon Engineering Power team to build chips that are more power efficient than ever before. You will help with the architecture, implementation, and verification of new low-power design and verification flows and help to craft the low-power methodologies across a wide variety of future technologies. The work involves creating flows and tools related to power analysis, optimization and verification which may be run as part of RTL construction/verification, synthesis, or P&R. Additional responsibilities include communicating with the design team to answer questions about the materials and drive issues to resolution.

Minimum Qualifications

• BS and a minimum of 3 years of relevant industry experience.

Preferred Qualifications

• Good understanding of VLSI designs and SOC design flows.
• Strong passion for scripting and applying low-power domain-specific knowledge to create new software solutions.
• Strong background with flow development and/or object-oriented language algorithm design such as Python / C++ / Java.
• Solid understanding and proven track record using modern software testing and development practices.
• Good written/verbal communications skills are required.
• Knowledge of Tcl / Perl, experience with EDA tools, GUI development, and/or low-power concepts such as UPF and low-power design is a plus.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

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Apple accepts applications to this posting on an ongoing basis.