SoC UPF Methodology Engineer

Apple Inc.; Beaverton (OR); On-site; USD 110,000 - 140,000; Full time

Job summary

A leading technology company is looking for a Power UPF Engineer to enhance Unified Power Format (UPF) methodologies and support advanced mobile SOC design. The ideal candidate will have a relevant bachelor's degree and at least 3 years of industry experience, with expertise in UPF implementation, scripting in Python and Tcl, and a solid understanding of CMOS power design principles. This role offers the opportunity to work closely with design and verification teams to troubleshoot and optimize UPF processes using cutting-edge AI/ML technologies.

Qualifications

• A minimum of 3 years of relevant industry experience.
• Expertise in UPF implementation and verification.
• Proficiency in scripting with Python and Tcl.

Responsibilities

• Enhance Unified Power Format (UPF) methodologies and validation for mobile SOCs.
• Develop tailored UPF solutions aligned with project requirements.
• Oversee UPF deployment and sign‑off for frontend and place‑and‑route stages.

Skills

UPF implementation and verification

Python scripting

Tcl scripting

CMOS power design principles

AI/ML application to coding

Static verification tools

Communication skills

Education

Bachelor’s degree in relevant field

Job description

Are you passionate about crafting solutions to intricate challenges? Join the Low Power group at Silicon Technologies and contribute to the development of cutting‑edge technology and capabilities for low‑power chip design. Your work will fuel Apple’s next-generation chips! You’ll play a crucial role in exploring AI/ML to design the workflow for the next generation of UPF. Additionally, you’ll refine our existing UPF framework and ensure its seamless integration and rigorous verification across our mobile products. You will be part of an exciting silicon design group that is responsible for designing state-of-the-art ASICs. We have an extraordinary opportunity for Power UPF Engineers, who will drive transistor level power ERC sign‑off and power intent‑UPF implementation & verification on mobile SOCs.

Description

In this role, your main objective will be to enhance our Unified Power Format (UPF) methodologies, refining power intent specification, execution, and validation to support state‑of‑the‑art mobile SOCs.

• Enhancing power intent coverage via advanced static and dynamic verification techniques.
• Developing tailored UPF solutions to align with unique project requirements.
• Overseeing UPF deployment and sign‑off for frontend (FE) and place‑and‑route (P&R) stages.
• Conducting thorough power intent assessments on custom circuitry.
• Partnering with design and verification teams to troubleshoot and fix UPF‑related workflow challenges.
• Integrating AI/ML technologies to optimize UPF processes and methodologies.

Minimum Qualifications

• A minimum of a bachelor’s degree in a relevant field and a minimum of 3 years of relevant industry experience.

Preferred Qualifications

• Expertise in UPF implementation and verification.
• Proficiency in scripting with languages like Python and Tcl.
• Understanding of CMOS power design principles.
• Experience applying AI/ML to coding and workflow optimization.
• Knowledge of multi‑voltage static verification tools (e.g., VSILP/VCLP, CLP).
• Familiarity with the complete RTL‑to‑GDSII design flow.
• Strong communication abilities for effective collaboration across multidisciplinary teams.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.

Apple accepts applications to this posting on an ongoing basis.