Low-Power SoC Flow & Methodology Engineer

Apple, Inc.; Austin (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

Apple Inc. in Austin, TX, is seeking a Power Flow Methodology Engineer to drive automated low-power design flows for next-generation chips. You will help architect, implement, and verify power analysis, optimization, and verification flows within the Silicon Engineering Power team.

You will collaborate with design teams to resolve issues, develop tools, and apply Tcl/Perl knowledge along with Python/C++/Java scripting to create robust solutions for RTL, synthesis, and P&R stages.

Qualifications

• BS and a minimum of 3 years of relevant industry experience.

Responsibilities

• Develop and enhance low-power flows and tools for power analysis, optimization and verification.
• Architect, implement and verify new low-power design flows across RTL, synthesis or P&R.
• Communicate with design teams to drive issues to resolution.

Skills

VLSI design

Scripting

Python

C++

Java

Software testing

Communication skills

Tcl

Perl

EDA tools

GUI development

UPF

Low-power design

Education

Bachelor's degree

Job description

Apple Inc. in Austin, TX, is seeking a Power Flow Methodology Engineer to drive automated low-power design flows for next-generation chips. You will help architect, implement, and verify power analysis, optimization, and verification flows within the Silicon Engineering Power team.

You will collaborate with design teams to resolve issues, develop tools, and apply Tcl/Perl knowledge along with Python/C++/Java scripting to create robust solutions for RTL, synthesis, and P&R stages.