SoC Power Analysis and Optimization Engineer

Apple Inc.; San Diego (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Apple Inc. in San Diego seeks an SoC Power Analysis and Optimization Engineer to drive SOC power simulation, optimization and modeling across IPs.

You will work with architecture, RTL and physical design teams to set power targets and apply automation and GenAI/LLM approaches to improve efficiency. The ideal candidate has a bachelor's degree with 10+ years in the field, deep hands-on experience in ASIC power analysis and strong cross-functional communication skills to coordinate with multiple

Qualifications

• Bachelor's degree in a relevant field with at least 10 years of industry experience.
• Experience in ASIC power analysis and optimization.
• Strong cross-functional collaboration and communication skills.

Responsibilities

• Drive SOC power simulation, optimization and modeling across IPs.
• Collaborate with architecture, RTL and physical design teams to set power targets.
• Develop automation and GenAI/LLM approaches to improve efficiency.

Skills

ASIC power analysis

Power optimization

Machine learning algorithms

SOC design flow

Computer architecture

Signal processing

Power measurement experience

Communication skills

Education

Bachelor's degree in a relevant field

Tools

Verilog

SystemVerilog

Python

Job description

SoC Power Analysis and Optimization Engineer

As part of our Silicon Engineering group, you will take imaginative and revolutionary ideas and determine how to turn them into reality! You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. Join us, and you will help design products that bring to our customers experiences they’ve never before envisioned. In this highly visible role, you will be responsible for SOC simulation, optimization and modeling.

Description

The main responsibility of this role is to drive the SOC power simulation, optimization and modeling. • Work with cross functional teams, including architecture, RTL and physical design teams, to determine the interesting use‑cases to simulate power, to provide power projections and targets for the future projects, and to improving the SOC power efficiency • Working with SOC power team members to drive power analysis and optimization tasks, improving the efficiency with automation and GenAI/LLM approaches. • Explore new methodology to analyze the power data, create power metrics to identify the optimization opportunities, drive automated approach to improve SOC power efficiency across IPs • Collaborate cross-functional teams to deploy the power optimization to improve SOC power, review results, improve the methodology on efficiency, runtime, and support boarder scope of designs.

Minimum Qualifications

• A minimum of a bachelor's degree in relevant field and a minimum of 10 years of relevant industry experience.

Preferred Qualifications

• Familiarity with ASIC power analysis and optimization
• Familiarity with machine learning algorithms and programming
• Familiarity with Verilog and System Verilog.
• Familiarity with SOC design flow and methodology
• Familiarity with scripting in Python.
• Familiarity computer architecture, logic and circuits design
• Familiarity signal processing is a plus
• Silicon power measurement experience is a plus
• SOC power modeling, low power design and power optimization experience is a plus
• Strong communication skills are a pre‑requisite as the candidate will interface with a lot of different groups

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

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Apple accepts applications to this posting on an ongoing basis.