SoC Memory Ecosystem Architect

NVIDIA Corporation

Santa Clara, Northern (CA, KY)

Hybrid

USD 320,000 - 489,000

Full time

14 days+

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Job summary

NVIDIA Corporation is seeking a Senior SoC Product Architect, Memory Ecosystem, to drive external memory ecosystems across DRAM and non-volatile memory. You will work with major memory vendors to align roadmaps with NVIDIA’s SoC platforms and co‑innovate new technologies to boost bandwidth, latency, and power efficiency.

You will collaborate with SoC architects, memory controllers, and system teams to optimize channel topologies, signaling, and power delivery while representing NVIDIA in

Qualifications

  • MS in Electrical Engineering, Computer Engineering, Physics, or related field, or equivalent experience.
  • 18+ years of experience in DRAM / memory subsystem architecture, SoC or memory controller design.
  • Deep understanding of modern DRAM technologies (DDR/LPDDR/GDDR/HBM) and non-volatile memories (NAND).
  • Experience with memory vendors on product definition, bring-up, or co-development.

Responsibilities

  • Partner with memory vendors to understand roadmaps and align them with NVIDIA’s SoC roadmaps.
  • Steer vendor roadmaps by articulating performance, power, capacity, form-factor and reliability requirements.
  • Innovate DRAM solutions and packaging/power-management techniques to meet bandwidth and latency needs.
  • Collaborate with SoC architects and board teams to optimize memory subsystem architecture.
  • Represent NVIDIA in vendor reviews and technical/roadmap meetings and drive follow-ups.

Skills

Memory architecture
DRAM technologies
Memory subsystem design
Vendor collaboration
SoC architecture
Power delivery
Signal integrity
Benchmarking

Education

MS in Electrical/Electrical Engineering / Computer Engineering / Physics or equivalent

Job description

NVIDIA Corporation is seeking a Senior SoC Product Architect, Memory Ecosystem, to drive external memory ecosystems across DRAM and non-volatile memory. You will work with major memory vendors to align roadmaps with NVIDIA’s SoC platforms and co‑innovate new technologies to boost bandwidth, latency, and power efficiency.

You will collaborate with SoC architects, memory controllers, and system teams to optimize channel topologies, signaling, and power delivery while representing NVIDIA in

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