Sr. Logic Design Engineer

Intel Corporation

Hillsboro (OR)

Hybrid

USD 142,000 - 200,000

Full time

14 days+

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Job summary

Intel Corporation's HIPD team seeks a senior Logic Design Engineer to join the UCIE PHY IP for data-center/server designs. You will develop RTL, participate in architecture and microarchitecture feature definition, and optimize for power, performance and area.

Responsibilities include RTL coding, timing/power convergence checks, review of verification plans, and ensuring RTL tests pass. This role supports a hybrid work model across US sites including Santa Clara, Hillsboro, Phoenix, and more.

Qualifications

  • Bachelor's degree with 4+ years experience or advanced degree with fewer years.
  • Experience RTL/Logic design using SystemVerilog.
  • Front End design tools for Lint and Synthesis; hardware simulation skills.

Responsibilities

  • Develops logic design, RTL coding, and simulation for IP block.
  • Participates in architecture/microarchitecture feature definition.
  • Performs quality checks from RTL to timing/power convergence.
  • Optimizes logic to meet power, performance, area goals; ensures design integrity.
  • Reviews verification plan and resolves RTL test failures.

Skills

RTL/Logic design (SystemVerilog)
Data path design
Power-management flow
Arbitration logic
Clock Domain Crossing
State Machines
UPF
Frontend tools (Lint, Synthesis)
Hardware simulation tools (VCS/Verdi)
IP environment & configuration mgmt

Education

Bachelor's degree in Electrical or Computer Engineering or related field

Tools

VCS
Verdi
Lint
Synthesis
IP config tools

Job description

Job Details: Job Description: Intel's HIPD team is looking for an experienced senior Logic design engineer to join the rapidly growing UCIE PHY IP for Intel's flagship datacenter/server designs.

Responsibilities
  • Develops the logic design, register transfer level (RTL) coding, and simulation for IP block.
  • Participates in the definition of architecture and microarchitecture features of the block being designed.
  • Performs quality checks in various logic design aspects ranging from RTL to timing/power convergence.
  • Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
  • Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
Behavior Skills We are Looking For
  • Excellent written and oral presentation skills, and willing to work across multiple organizations and geographies.
  • Effective team player with continuous learning mindset.
  • Strong analytical and problem-solving skills.
  • Be willing to balance multiple tasks.
  • Ramp quickly on new and complex IPs in a dynamic environment is critical.
Qualifications

Minimum Qualifications: Candidate must possess a Bachelor's degree in Electrical or Computer Engineering or a related field and 4+ years' experience OR a Master's degree in Electrical or Computer Engineering or a related field and 2+ years' experience OR a PhD in Electrical or Computer Engineering or a related field and 1+ years' experience.

Relevant Work Experience must be in:

  • RTL/Logic design using System Verilog Language
  • Experience with Design of Data path, Power-management flow, Arbitration logic, Clock Domain Crossing, State Machines, UPF
  • Experience with Front End design tools for Lint, Synthesis.
  • Experience with hardware simulation tools and methodologies (VCS/Verdi).
  • Familiarity with IP environment and configuration management tools.

Preferred Qualifications: UCIE PHY Design and Mixed-Signal Environment. Cross Domain Crossing, Voltage Domain Crossings, Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Job Type and Location

Job Type: Experienced Hire
Shift: Shift 1 (United States of America)
Primary Location: US, California, Santa Clara
Additional Locations: US, Arizona, Phoenix, US, Oregon, Hillsboro

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $141,910.00-200,340.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.

Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Additional Information

* Job posting details (such as work model, location or time type) are subject to change.

* ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter. Intel’s official careers website.

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