CPU Core Logic Designer

Intel; Folsom (CA); Hybrid; USD 122,440 - 172,860; Full time

Benefits offered by this job

Stock bonuses

Health insurance

Retirement plan

Vacation

Job summary

Intel is seeking an Experienced Hire for a CPU RTL design role in Folsom, California. The engineer will develop logic design, RTL coding, and simulation to support generation of cell libraries, functional units, and CPU IP blocks for full chip integration.

The position involves architecture/microarchitecture feature definition, RTL optimization for power, performance, and area, and verification plan reviews. Collaboration with SoC customers is essential.

Qualifications

• Bachelor's degree in Electrical/Computer Engineering or Computer Science with 2+ years experience, or Master's with 1+ years.
• 6+ months combined experience in System Verilog/Verilog/VHDL and/or VCS or similar simulator.
• Computer architecture and microarchitecture.
• Software/programming languages (i.e. C, C++, C#, Visual Basic/.NET, Perl, Python, Java, etc.).
• Modern energy efficient/low power logic design techniques, including those specifically applicable to high frequency optimization.

Responsibilities

• Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs.
• Participates actively in the definition of architecture and microarchitecture features of the CPU being designed.
• Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
• Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
• Documents micro architectural specs (MAS) of the CPU features being designed.
• Supports SoC customers to ensure high quality integration of the CPU block.

Skills

RTL design

HDL languages

Computer architecture

Programming languages

Low power design

Education

Bachelor's degree in Electrical/Computer Engineering or Computer Science

Master's degree in Electrical/Computer Engineering or Computer Science

Tools

VCS or similar simulator

Job description

• Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs.
• Participates actively in the definition of architecture and microarchitecture features of the CPU being designed.
• Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
• Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
• Documents micro architectural specs (MAS) of the CPU features being designed.
• Supports SoC customers to ensure high quality integration of the CPU block.

Job Details

Job Description:

• Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs.
• Participates actively in the definition of architecture and microarchitecture features of the CPU being designed.
• Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
• Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
• Documents micro architectural specs (MAS) of the CPU features being designed.
• Supports SoC customers to ensure high quality integration of the CPU block.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

• Bachelor's degree in Electrical/Computer Engineering or Computer Science and 2+ years of experience or a Master's degree in Electrical/Computer Engineering or Computer Science and 1+ years of experience.
• 6+ months combined experience in: System Verilog/Verilog/VHDL and/or VCS or similar Simulator Logic design and/or front end.
• Computer architecture and microarchitecture.
• Software/programming languages (i.e. C, C++, C#, Visual Basic/.NET. Perl, Python, Java, etc.).
• Modern energy efficient/low power logic design techniques, including those specifically applicable to high frequency optimization.

Preferred Qualifications

• Knowledge of Intel Architecture ISA and system architecture, including x86 assembly language.
• Experience with high speed circuit design and optimization for Datapath, circuits and/or arrays.
• Familiarity with circuit planning and timing convergence.
• Experience working with cross functional teams (Architecture, Spec development, Design, Formal, Verification).

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Job Type

Experienced Hire

Shift

Shift 1 (United States of America)

Primary Location

US, California, Folsom

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $122,440.00 - 172,860.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.