SoC Full Chip DV Engineer

Apple, Inc.

Jackson (TN)

On-site

USD 150,000 - 278,000

Full time

14 days+

Get a reply from this employer

Your resume and cover letter, tailored to exactly what they’re hiring for.

Get past ATS filters

Benefits offered by this job

Medical & dental coverage
Retirement benefits
Discounted products and services
Education reimbursement

Job summary

Apple Inc. in the United States is seeking a Design Verification Engineer to verify the functionality and performance of Apple's premier SoCs.

You will review designs, build test plans and test benches, and collaborate with design, architecture and software teams to define use cases and test scenarios. The role requires strong digital verification experience, knowledge of Verilog/SystemVerilog, and the ability to run regressions, triage bugs, and analyze coverage to drive high-quality results.

Qualifications

  • BS degree in a relevant field with 3+ years of experience.
  • Strong understanding of chip verification and test benches.
  • Excellent communication with design and software teams.

Responsibilities

  • Verify functionality and performance of Apple SOCs.
  • Develop test plans, coverage plans, and test benches.
  • Run regressions, triage bugs, and analyze coverage.

Skills

Digital verification
Constrained random verification
Functional coverage
Code coverage
Debugging
Independent work

Education

BS degree in Electrical Engineering or related field

Tools

Verilog/SystemVerilog
Python
UVM
Debugging tools

Job description

Does making the next great technology product excite you? Imagine what you could do here. At Apple, our new insights have a way of becoming great products, services, and customer experiences very quickly. We bring passion and dedication to our job and when you are a part of that team there's no telling what we'll could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple's premier SOCs. This is a critical job within Apple's Hardware Technology, and we'd love to have you join us.

Description

As part of a very talented team, we are at the heart of the chip design effort collaborating with all fields (vertical product model)! You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design and architecture specifications and work closely with design & micro-architecture teams. A key component to the job is understanding the functional & performance goals of the design and you use this knowledge to test effectively. You develop test plans; tests & coverage plans as well as define our next generation verification methodology & test benches. It's required that you communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases. We also require additional responsibilities such as running and triaging regressions, tracking bugs, and analyzing coverage to achieve top results.

Preferred Qualifications
  • Skilled in many aspects of digital verification such as constrained random verification process, functional coverage, code coverage, assertion methodology & philosophy
  • Knowledge of Verilog/SystemVerilog, digital simulation and debug
  • Knowledge of computer architecture and digital design fundamentals
  • Ability to work independently to deliver the project goals
  • Exposure to UVM is desired
  • Experience with C/C++, assembly is a plus
  • Experience with perl, python or similar scripting language
  • Excellent interpersonal skills and the dream to take on diverse challenges
Minimum Qualifications

Minimum of BS + 3 years relevant industry experience.

Pay & Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 and $277,600, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including:

  • Comprehensive medical and dental coverage
  • retirement benefits
  • a range of discounted products and free services
  • for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition

Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

SoC Design Verification Engineer
SoC Design Verification Engineer

Apple, Inc. • Austin (TX)

On-site
USD 147,400 - 272,100
Comprehensive medical and dental coverage
Retirement benefits
Employee stock purchase plan
+1
SoC Physical Design Verification Engineer
SoC Physical Design Verification Engineer

Apple, Inc. • Jackson (TN)

On-site
USD 150,000 - 278,000
Design Verification Engineer
Design Verification Engineer

Apple Inc. • Cupertino (CA)

On-site
USD 126,800 - 190,900
Comprehensive medical and dental coverage
Retirement benefits
Discounted products and services
+1
SoC Full Chip DV Engineer
SoC Full Chip DV Engineer

Apple Inc. • Austin (TX)

On-site
USD 100,000 - 140,000
Design Verification Engineer
Design Verification Engineer

Apple, Inc. • Los Angeles (CA)

On-site
USD 120,300 - 181,200
Comprehensive medical and dental coverage
Employee stock programs
Tuition reimbursement for education
Design Verification Engineer
Design Verification Engineer

Apple, Inc. • Seattle (WA)

On-site
USD 175,000 - 308,500
Design Verification Engineer
Design Verification Engineer

Apple, Inc. • Cupertino (CA)

On-site
USD 174,000 - 225,000
Design Verification Engineer
Design Verification Engineer

Apple, Inc. • San Diego (CA)

On-site
USD 175,000 - 309,000
Medical and dental coverage
Employee stock programs
Relocation assistance
Design Verification Engineer
Design Verification Engineer

Apple, Inc. • Waltham (MA)

On-site
USD 135,000 - 250,000
Health insurance
Retirement benefits
Stock programs
+5
Formal Verification Engineer
Formal Verification Engineer

Apple, Inc. • Austin (TX)

On-site
USD 150,000 - 278,000
Comprehensive medical and dental
Retirement benefits
Employee stock programs
+3